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fpga/mux2_oneout.v Normal file
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//-----------------------------------------------------------------------------
// Two way MUX.
//
// kombi, 2020.05
//-----------------------------------------------------------------------------
module mux2_oneout(
input [1:0] sel,
input y,
output reg x0,
output reg x1
);
always @(*)
begin
case (sel)
1'b0: x1 = y;
1'b1: x0 = y;
endcase
end
endmodule