mirror of
https://github.com/RfidResearchGroup/proxmark3.git
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Merge remote-tracking branch 'upstream/master'
This commit is contained in:
marshmellow42
commit
be2cf126bf
31 changed files with 2120 additions and 266 deletions
142
armsrc/lfops.c
142
armsrc/lfops.c
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@ -15,130 +15,44 @@
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#include "crc16.h"
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#include "string.h"
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#include "lfdemod.h"
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#include "lfsampling.h"
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/**
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* Does the sample acquisition. If threshold is specified, the actual sampling
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* is not commenced until the threshold has been reached.
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* @param trigger_threshold - the threshold
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* @param silent - is true, now outputs are made. If false, dbprints the status
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*/
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void DoAcquisition125k_internal(int trigger_threshold,bool silent)
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{
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uint8_t *dest = BigBuf_get_addr();
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int n = BigBuf_max_traceLen();
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int i;
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memset(dest, 0, n);
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i = 0;
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for(;;) {
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
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AT91C_BASE_SSC->SSC_THR = 0x43;
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LED_D_ON();
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}
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
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dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
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LED_D_OFF();
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if (trigger_threshold != -1 && dest[i] < trigger_threshold)
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continue;
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else
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trigger_threshold = -1;
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if (++i >= n) break;
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}
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}
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if(!silent)
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{
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Dbprintf("buffer samples: %02x %02x %02x %02x %02x %02x %02x %02x ...",
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dest[0], dest[1], dest[2], dest[3], dest[4], dest[5], dest[6], dest[7]);
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}
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}
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/**
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* Perform sample aquisition.
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*/
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void DoAcquisition125k(int trigger_threshold)
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{
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DoAcquisition125k_internal(trigger_threshold, false);
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}
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/**
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* Setup the FPGA to listen for samples. This method downloads the FPGA bitstream
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* if not already loaded, sets divisor and starts up the antenna.
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* @param divisor : 1, 88> 255 or negative ==> 134.8 KHz
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* 0 or 95 ==> 125 KHz
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*
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**/
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void LFSetupFPGAForADC(int divisor, bool lf_field)
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{
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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if ( (divisor == 1) || (divisor < 0) || (divisor > 255) )
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
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else if (divisor == 0)
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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else
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | (lf_field ? FPGA_LF_ADC_READER_FIELD : 0));
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// Connect the A/D to the peak-detected low-frequency path.
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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// Give it a bit of time for the resonant antenna to settle.
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SpinDelay(50);
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// Now set up the SSC to get the ADC samples that are now streaming at us.
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FpgaSetupSsc();
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}
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/**
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* Initializes the FPGA, and acquires the samples.
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**/
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void AcquireRawAdcSamples125k(int divisor)
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{
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LFSetupFPGAForADC(divisor, true);
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// Now call the acquisition routine
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DoAcquisition125k_internal(-1,false);
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}
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/**
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* Initializes the FPGA for snoop-mode, and acquires the samples.
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**/
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void SnoopLFRawAdcSamples(int divisor, int trigger_threshold)
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{
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LFSetupFPGAForADC(divisor, false);
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DoAcquisition125k(trigger_threshold);
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}
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* Function to do a modulation and then get samples.
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* @param delay_off
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* @param period_0
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* @param period_1
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* @param command
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*/
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void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1, uint8_t *command)
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{
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/* Make sure the tag is reset */
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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SpinDelay(2500);
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int divisor_used = 95; // 125 KHz
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// see if 'h' was specified
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if (command[strlen((char *) command) - 1] == 'h')
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divisor_used = 88; // 134.8 KHz
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sample_config sc = { 0,0,1, divisor_used, 0};
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setSamplingConfig(&sc);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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// Give it a bit of time for the resonant antenna to settle.
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SpinDelay(50);
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/* Make sure the tag is reset */
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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SpinDelay(2500);
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// And a little more time for the tag to fully power up
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SpinDelay(2000);
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LFSetupFPGAForADC(sc.divisor, 1);
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// Now set up the SSC to get the ADC samples that are now streaming at us.
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FpgaSetupSsc();
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// And a little more time for the tag to fully power up
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SpinDelay(2000);
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// now modulate the reader field
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while(*command != '\0' && *command != ' ') {
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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LED_D_OFF();
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SpinDelayUs(delay_off);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, sc.divisor);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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LED_D_ON();
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@ -150,14 +64,16 @@ void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1,
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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LED_D_OFF();
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SpinDelayUs(delay_off);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, sc.divisor);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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// now do the read
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DoAcquisition125k(-1);
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DoAcquisition_config(false);
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}
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/* blank r/w tag data stream
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...0000000000000000 01111111
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1010101010101010101010101010101010101010101010101010101010101010
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@ -645,8 +561,8 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
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WDT_HIT();
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if (ledcontrol) LED_A_ON();
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DoAcquisition125k_internal(-1,true);
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// FSK demodulator
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DoAcquisition_default(-1,true);
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// FSK demodulator
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size = sizeOfBigBuff; //variable size will change after demod so re initialize it before use
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idx = HIDdemodFSK(dest, &size, &hi2, &hi, &lo);
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@ -734,8 +650,8 @@ void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
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WDT_HIT();
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if (ledcontrol) LED_A_ON();
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DoAcquisition125k_internal(-1,true);
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size = BigBuf_max_traceLen();
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DoAcquisition_default(-1,true);
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size = BigBuf_max_traceLen();
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//Dbprintf("DEBUG: Buffer got");
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//askdemod and manchester decode
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errCnt = askmandemod(dest, &size, &clk, &invert, maxErr);
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@ -787,8 +703,8 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
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while(!BUTTON_PRESS()) {
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WDT_HIT();
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if (ledcontrol) LED_A_ON();
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DoAcquisition125k_internal(-1,true);
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//fskdemod and get start index
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DoAcquisition_default(-1,true);
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//fskdemod and get start index
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WDT_HIT();
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idx = IOdemodFSK(dest, BigBuf_max_traceLen());
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if (idx>0){
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@ -1394,7 +1310,9 @@ int DemodPCF7931(uint8_t **outBlocks) {
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int lmin=128, lmax=128;
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uint8_t dir;
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AcquireRawAdcSamples125k(0);
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LFSetupFPGAForADC(95, true);
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DoAcquisition_default(0, 0);
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lmin = 64;
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lmax = 192;
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