mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-20 13:23:51 -07:00
ADD: @marshmellows fixes for t55x7 reading signal.
ADD: @marshmellows "diphase" definition for T55x7. MOV: extracted the aquisition from the t55x7 methods and put them inside lfsampling.c FIX: pcf7931 write, there is 16bytes in a block.. not 4 as I thought before. FIX: t55x7 lowered the WRITE_0 to 16. Even bigger gap.
This commit is contained in:
parent
368044201a
commit
ac2df3460a
10 changed files with 146 additions and 117 deletions
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@ -994,7 +994,7 @@ void UsbPacketReceived(uint8_t *packet, int len)
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cmd_send(CMD_ACK,0,0,0,0,0);
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break;
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case CMD_PCF7931_WRITE:
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WritePCF7931(c->d.asDwords[0],c->d.asDwords[1],c->d.asDwords[2],c->d.asDwords[3],c->d.asDwords[4],c->d.asDwords[5],c->d.asDwords[6], c->d.asDwords[9], c->d.asDwords[7]-128,c->d.asDwords[8]-128, c->arg[0], c->arg[1], c->arg[2]);
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WritePCF7931(c->d.asBytes[0],c->d.asBytes[1],c->d.asBytes[2],c->d.asBytes[3],c->d.asBytes[4],c->d.asBytes[5],c->d.asBytes[6], c->d.asBytes[9], c->d.asBytes[7]-128,c->d.asBytes[8]-128, c->arg[0], c->arg[1], c->arg[2]);
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break;
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case CMD_EM4X_READ_WORD:
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EM4xReadWord(c->arg[1], c->arg[2],c->d.asBytes[0]);
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@ -95,16 +95,6 @@ void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode);
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void EM4xWriteWord(uint32_t Data, uint8_t Address, uint32_t Pwd, uint8_t PwdMode);
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void CopyViKingtoT55x7(uint32_t block1,uint32_t block2);
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/// pcf7931.h
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int DemodPCF7931(uint8_t **outBlocks);
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int IsBlock0PCF7931(uint8_t *Block);
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int IsBlock1PCF7931(uint8_t *Block);
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void ReadPCF7931();
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void SendCmdPCF7931(uint32_t * tab);
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bool AddBytePCF7931(uint8_t byte, uint32_t * tab, int32_t l, int32_t p);
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bool AddBitPCF7931(bool b, uint32_t * tab, int32_t l, int32_t p);
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bool AddPatternPCF7931(uint32_t a, uint32_t b, uint32_t c, uint32_t * tab);
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void WritePCF7931(uint8_t pass1, uint8_t pass2, uint8_t pass3, uint8_t pass4, uint8_t pass5, uint8_t pass6, uint8_t pass7, uint16_t init_delay, int32_t l, int32_t p, uint8_t address, uint8_t byte, uint8_t data);
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/// iso14443.h
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void SimulateIso14443bTag(void);
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108
armsrc/lfops.c
108
armsrc/lfops.c
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@ -1096,6 +1096,7 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
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#define T55x7_MODULATION_FSK2a 0x00007000
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#define T55x7_MODULATION_MANCHESTER 0x00008000
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#define T55x7_MODULATION_BIPHASE 0x00010000
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#define T55x7_MODULATION_DIPHASE 0x00018000
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//#define T55x7_MODULATION_BIPHASE57 0x00011000
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#define T55x7_BITRATE_RF_8 0
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#define T55x7_BITRATE_RF_16 0x00040000
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@ -1135,7 +1136,7 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
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#define START_GAP 50*8 // was 250 // SPEC: 1*8 to 50*8 - typ 15*8 (or 15fc)
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#define WRITE_GAP 20*8 // was 160 // SPEC: 1*8 to 20*8 - typ 10*8 (or 10fc)
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#define WRITE_0 18*8 // was 144 // SPEC: 16*8 to 32*8 - typ 24*8 (or 24fc)
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#define WRITE_0 16*8 // was 144 // SPEC: 16*8 to 32*8 - typ 24*8 (or 24fc)
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#define WRITE_1 50*8 // was 400 // SPEC: 48*8 to 64*8 - typ 56*8 (or 56fc) 432 for T55x7; 448 for E5550
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// VALUES TAKEN FROM EM4x function: SendForward
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@ -1152,7 +1153,6 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
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// T0 = TIMER_CLOCK1 / 125000 = 192
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// 1 Cycle = 8 microseconds(us)
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#define T55xx_SAMPLES_SIZE 12000 // 32 x 32 x 10 (32 bit times numofblock (7), times clock skip..)
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// Write one bit to card
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void T55xxWriteBit(int bit)
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@ -1175,7 +1175,7 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMod
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// Set up FPGA, 125kHz
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// Wait for config.. (192+8190xPOW)x8 == 67ms
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LFSetupFPGAForADC(0, true);
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LFSetupFPGAForADC(95, true);
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// Now start writting
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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@ -1208,124 +1208,82 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMod
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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}
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void TurnReadLFOn(){
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void TurnReadLFOn(int delay){
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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// Give it a bit of time for the resonant antenna to settle.
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SpinDelayUs(300);
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SpinDelayUs(delay);
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}
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// Read one card block in page 0
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void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
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{
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uint32_t i = 0;
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uint8_t *dest = BigBuf_get_addr();
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uint16_t bufferlength = BigBuf_max_traceLen();
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if ( bufferlength > T55xx_SAMPLES_SIZE )
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bufferlength = T55xx_SAMPLES_SIZE;
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// Clear destination buffer before sending the command
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memset(dest, 0x80, bufferlength);
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//make sure block is at max 7
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Block &= 0x7;
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// Set up FPGA, 125kHz
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// Wait for config.. (192+8190xPOW)x8 == 67ms
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//LFSetupFPGAForADC(0, true);
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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// Connect the A/D to the peak-detected low-frequency path.
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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// Now set up the SSC to get the ADC samples that are now streaming at us.
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FpgaSetupSsc();
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// Give it a bit of time for the resonant antenna to settle.
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//SpinDelayUs(8*200); //192FC
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SpinDelay(50);
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LFSetupFPGAForADC(95, true);
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// Trigger T55x7 in mode.
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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//SpinDelayUs(START_GAP);
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SpinDelayUs(START_GAP);
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// Opcode
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// Opcode 10
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T55xxWriteBit(1);
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T55xxWriteBit(0); //Page 0
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if (PwdMode == 1){
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// Pwd
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for (i = 0x80000000; i != 0; i >>= 1)
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T55xxWriteBit(Pwd & i);
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}
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// Lock bit
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// zero bit to seperate
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T55xxWriteBit(0);
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// Block
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for (i = 0x04; i != 0; i >>= 1)
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T55xxWriteBit(Block & i);
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// Turn field on to read the response
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TurnReadLFOn();
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// Now do the acquisition
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i = 0;
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for(;;) {
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
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AT91C_BASE_SSC->SSC_THR = 0x43;
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LED_D_ON();
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}
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
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dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
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i++;
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LED_D_OFF();
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if (i >= bufferlength) break;
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}
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// Block
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for (i = 0x04; i != 0; i >>= 1) {
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T55xxWriteBit(Block & i);
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Dbprintf("ice %d",i);
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}
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// Turn field on to read the response
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TurnReadLFOn(START_GAP);
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// Acquisition
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doT55x7Acquisition();
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// field off
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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cmd_send(CMD_ACK,0,0,0,0,0);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
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LED_D_OFF();
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}
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// Read card traceability data (page 1)
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void T55xxReadTrace(void){
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uint32_t i = 0;
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uint8_t *dest = BigBuf_get_addr();
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uint16_t bufferlength = BigBuf_max_traceLen();
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if ( bufferlength > T55xx_SAMPLES_SIZE )
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bufferlength= T55xx_SAMPLES_SIZE;
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// Clear destination buffer before sending the command
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memset(dest, 0x80, bufferlength);
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LFSetupFPGAForADC(0, true);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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SpinDelayUs(START_GAP);
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// Opcode
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// Opcode 11
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T55xxWriteBit(1);
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T55xxWriteBit(1); //Page 1
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// Turn field on to read the response
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TurnReadLFOn();
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TurnReadLFOn(START_GAP);
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// Now do the acquisition
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for(;;) {
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
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AT91C_BASE_SSC->SSC_THR = 0x43;
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LED_D_ON();
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}
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
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dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
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i++;
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LED_D_OFF();
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if (i >= bufferlength) break;
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}
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}
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// Acquisition
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doT55x7Acquisition();
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// field off
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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cmd_send(CMD_ACK,0,0,0,0,0);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
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LED_D_OFF();
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}
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/*-------------- Cloning routines -----------*/
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// Copy HID id to card and setup block 0 config
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void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
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@ -245,7 +245,60 @@ uint32_t SampleLF(bool printCfg)
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* @return number of bits sampled
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**/
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uint32_t SnoopLF()
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{
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uint32_t SnoopLF() {
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return ReadLF(false, true);
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}
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/**
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* acquisition of T55x7 LF signal. Similart to other LF, but adjusted with @marshmellows thresholds
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* the data is collected in BigBuf.
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**/
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void doT55x7Acquisition(void){
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#define T55xx_SAMPLES_SIZE 12000 // 32 x 32 x 10 (32 bit times numofblock (7), times clock skip..)
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#define T55xx_READ_UPPER_THRESHOLD 128+40 // 50
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#define T55xx_READ_TOL 5
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//#define T55xx_READ_LOWER_THRESHOLD 128-40 //-50
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uint8_t *dest = BigBuf_get_addr();
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uint16_t bufsize = BigBuf_max_traceLen();
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if ( bufsize > T55xx_SAMPLES_SIZE )
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bufsize = T55xx_SAMPLES_SIZE;
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memset(dest, 0, bufsize);
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uint16_t i = 0;
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bool startFound = false;
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bool highFound = false;
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uint8_t curSample = 0;
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uint8_t firstSample = 0;
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for(;;) {
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
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AT91C_BASE_SSC->SSC_THR = 0x43;
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LED_D_ON();
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}
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
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curSample = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
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// find first high sample
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if (!startFound && curSample > T55xx_READ_UPPER_THRESHOLD) {
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if (curSample > firstSample)
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firstSample = curSample;
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highFound = true;
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} else if (!highFound) {
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continue;
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}
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// skip until samples begin to change
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if (startFound || curSample < firstSample-T55xx_READ_TOL){
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if (!startFound)
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dest[i++] = firstSample;
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startFound = true;
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dest[i++] = curSample;
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LED_D_OFF();
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if (i >= bufsize) break;
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}
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}
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}
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}
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@ -1,6 +1,12 @@
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#ifndef LFSAMPLING_H
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#define LFSAMPLING_H
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/**
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* acquisition of T55x7 LF signal. Similart to other LF, but adjusted with @marshmellows thresholds
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* the data is collected in BigBuf.
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**/
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void doT55x7Acquisition(void);
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/**
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* Initializes the FPGA for reader-mode (field on), and acquires the samples.
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* @return number of bits sampled
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@ -1,4 +1,8 @@
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#include "proxmark3.h"
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#include "apps.h"
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#include "lfsampling.h"
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#include "pcf7931.h"
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#include "string.h"
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#define T0_PCF 8 //period for the pcf7931 in us
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#define ALLOC 16
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@ -1,8 +1,14 @@
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#ifndef __PCF7931_H
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#define __PCF7931_H
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#include "proxmark3.h"
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#include "apps.h"
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#include "lfsampling.h"
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int DemodPCF7931(uint8_t **outBlocks);
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int IsBlock0PCF7931(uint8_t *Block);
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int IsBlock1PCF7931(uint8_t *Block);
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void ReadPCF7931();
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void SendCmdPCF7931(uint32_t * tab);
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bool AddBytePCF7931(uint8_t byte, uint32_t * tab, int32_t l, int32_t p);
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bool AddBitPCF7931(bool b, uint32_t * tab, int32_t l, int32_t p);
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bool AddPatternPCF7931(uint32_t a, uint32_t b, uint32_t c, uint32_t * tab);
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void WritePCF7931(uint8_t pass1, uint8_t pass2, uint8_t pass3, uint8_t pass4, uint8_t pass5, uint8_t pass6, uint8_t pass7, uint16_t init_delay, int32_t l, int32_t p, uint8_t address, uint8_t byte, uint8_t data);
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#endif
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@ -66,7 +66,7 @@ int usage_pcf7931_write(){
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PrintAndLog("Options:");
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PrintAndLog(" h This help");
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PrintAndLog(" blockaddress Block to save [0-7]");
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PrintAndLog(" byteaddress Index of byte inside block to write [0-3]");
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PrintAndLog(" byteaddress Index of byte inside block to write [0-16]");
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PrintAndLog(" data one byte of data (hex)");
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PrintAndLog("Examples:");
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PrintAndLog(" lf pcf7931 write 2 1 FF");
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@ -136,7 +136,7 @@ int CmdLFPCF7931Write(const char *Cmd){
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if ( param_getdec(Cmd, 0, &block) ) return usage_pcf7931_write();
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if ( param_getdec(Cmd, 1, &bytepos) ) return usage_pcf7931_write();
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if ( (block > 7) || (bytepos > 3) ) return usage_pcf7931_write();
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if ( (block > 7) || (bytepos > 16) ) return usage_pcf7931_write();
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data = param_get8ex(Cmd, 2, 0, 16);
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@ -267,8 +267,8 @@ bool DecodeT55xxBlock(){
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DemodBufferLen = 0x00;
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//trim 1/2 a clock from beginning
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snprintf(cmdStr, sizeof(buf),"%d", bitRate[config.bitrate]/2 );
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CmdLtrim(cmdStr);
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//snprintf(cmdStr, sizeof(buf),"%d", bitRate[config.bitrate]/2 );
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//CmdLtrim(cmdStr);
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switch( config.modulation ){
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case DEMOD_FSK:
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snprintf(cmdStr, sizeof(buf),"%d %d", bitRate[config.bitrate], config.inverted );
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// detect configuration?
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bool tryDetectModulation(){
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char cmdStr[8] = {0};
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//char cmdStr[8] = {0};
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uint8_t hits = 0;
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t55xx_conf_block_t tests[15];
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int bitRate=0;
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@ -338,8 +338,8 @@ bool tryDetectModulation(){
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save_restoreGB(1);
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if (GetFskClock("", FALSE, FALSE)){
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fskClocks(&fc1, &fc2, &clk, FALSE);
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sprintf(cmdStr,"%d", clk/2);
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CmdLtrim(cmdStr);
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//sprintf(cmdStr,"%d", clk/2);
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//CmdLtrim(cmdStr);
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if ( FSKrawDemod("0 0", FALSE) && test(DEMOD_FSK, &tests[hits].offset, &bitRate)){
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tests[hits].modulation = DEMOD_FSK;
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if (fc1==8 && fc2 == 5)
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@ -365,10 +365,9 @@ bool tryDetectModulation(){
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}
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} else {
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clk = GetAskClock("", FALSE, FALSE);
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if (clk>0) {
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sprintf(cmdStr,"%d", clk/2);
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CmdLtrim(cmdStr);
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//sprintf(cmdStr,"%d", clk/2);
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//CmdLtrim(cmdStr);
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if ( ASKDemod("0 0 0", FALSE, FALSE, 1) && test(DEMOD_ASK, &tests[hits].offset, &bitRate)) {
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tests[hits].modulation = DEMOD_ASK;
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tests[hits].bitrate = bitRate;
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@ -402,8 +401,8 @@ bool tryDetectModulation(){
|
|||
save_restoreGB(0);
|
||||
clk = GetNrzClock("", FALSE, FALSE);
|
||||
if (clk>0) {
|
||||
sprintf(cmdStr,"%d", clk/2);
|
||||
CmdLtrim(cmdStr);
|
||||
//sprintf(cmdStr,"%d", clk/2);
|
||||
//CmdLtrim(cmdStr);
|
||||
if ( NRZrawDemod("0 0 1", FALSE) && test(DEMOD_NRZ, &tests[hits].offset, &bitRate)) {
|
||||
tests[hits].modulation = DEMOD_NRZ;
|
||||
tests[hits].bitrate = bitRate;
|
||||
|
@ -425,9 +424,9 @@ bool tryDetectModulation(){
|
|||
save_restoreGB(0);
|
||||
clk = GetPskClock("", FALSE, FALSE);
|
||||
if (clk>0) {
|
||||
PrintAndLog("clk %d",clk);
|
||||
sprintf(cmdStr,"%d", clk/2);
|
||||
CmdLtrim(cmdStr);
|
||||
//PrintAndLog("clk %d",clk);
|
||||
//sprintf(cmdStr,"%d", clk/2);
|
||||
//CmdLtrim(cmdStr);
|
||||
if ( PSKDemod("0 0 1", FALSE) && test(DEMOD_PSK1, &tests[hits].offset, &bitRate)) {
|
||||
tests[hits].modulation = DEMOD_PSK1;
|
||||
tests[hits].bitrate = bitRate;
|
||||
|
@ -665,7 +664,7 @@ int CmdT55xxWriteBlock(const char *Cmd)
|
|||
|
||||
if (block > 7) {
|
||||
PrintAndLog("Block number must be between 0 and 7");
|
||||
return 2;
|
||||
return 1;
|
||||
}
|
||||
|
||||
UsbCommand resp;
|
||||
|
|
|
@ -369,7 +369,9 @@ size_t fsk_wave_demod(uint8_t * dest, size_t size, uint8_t fchigh, uint8_t fclow
|
|||
if (fclow==0) fclow=8;
|
||||
//set the threshold close to 0 (graph) or 128 std to avoid static
|
||||
uint8_t threshold_value = 123;
|
||||
|
||||
size_t preLastSample = 0;
|
||||
size_t LastSample = 0;
|
||||
size_t currSample = 0;
|
||||
// sync to first lo-hi transition, and threshold
|
||||
|
||||
// Need to threshold first sample
|
||||
|
@ -389,13 +391,22 @@ size_t fsk_wave_demod(uint8_t * dest, size_t size, uint8_t fchigh, uint8_t fclow
|
|||
|
||||
// Check for 0->1 transition
|
||||
if (dest[idx-1] < dest[idx]) { // 0 -> 1 transition
|
||||
if ((idx-last_transition)<(fclow-2)){ //0-5 = garbage noise
|
||||
preLastSample = LastSample;
|
||||
LastSample = currSample;
|
||||
currSample = idx-last_transition;
|
||||
if (currSample < (fclow-2)){ //0-5 = garbage noise
|
||||
//do nothing with extra garbage
|
||||
} else if ((idx-last_transition) < (fchigh-1)) { //6-8 = 8 waves
|
||||
} else if (currSample < (fchigh-1)) { //6-8 = 8 sample waves
|
||||
if (LastSample > (fchigh-2) && preLastSample < (fchigh-1)){
|
||||
dest[numBits-1]=1; //correct last 9 wave surrounded by 8 waves
|
||||
}
|
||||
dest[numBits++]=1;
|
||||
} else if ((idx-last_transition) > (fchigh+1) && !numBits) { //12 + and first bit = garbage
|
||||
|
||||
} else if (currSample > (fchigh+1) && !numBits) { //12 + and first bit = garbage
|
||||
//do nothing with beginning garbage
|
||||
} else { //9+ = 10 waves
|
||||
} else if (currSample == (fclow+1) && LastSample == (fclow-1)) { // had a 7 then a 9 should be two 8's
|
||||
dest[numBits++]=1;
|
||||
} else { //9+ = 10 sample waves
|
||||
dest[numBits++]=0;
|
||||
}
|
||||
last_transition = idx;
|
||||
|
@ -580,7 +591,7 @@ int IOdemodFSK(uint8_t *dest, size_t size)
|
|||
|
||||
// by marshmellow
|
||||
// takes a array of binary values, start position, length of bits per parity (includes parity bit),
|
||||
// Parity Type (1 for odd; 0 for even; 2 for just drop it), and binary Length (length to run)
|
||||
// Parity Type (1 for odd; 0 for even; 2 Always 1's), and binary Length (length to run)
|
||||
size_t removeParity(uint8_t *BitStream, size_t startIdx, uint8_t pLen, uint8_t pType, size_t bLen)
|
||||
{
|
||||
uint32_t parityWd = 0;
|
||||
|
@ -590,10 +601,12 @@ size_t removeParity(uint8_t *BitStream, size_t startIdx, uint8_t pLen, uint8_t p
|
|||
parityWd = (parityWd << 1) | BitStream[startIdx+word+bit];
|
||||
BitStream[j++] = (BitStream[startIdx+word+bit]);
|
||||
}
|
||||
j--;
|
||||
j--; // overwrite parity with next data
|
||||
// if parity fails then return 0
|
||||
if (pType != 2) {
|
||||
if (parityTest(parityWd, pLen, pType) == 0) return -1;
|
||||
if (pType == 2) { // then marker bit which should be a 1
|
||||
if (!BitStream[j]) return 0;
|
||||
} else {
|
||||
if (parityTest(parityWd, pLen, pType) == 0) return 0;
|
||||
}
|
||||
bitCnt+=(pLen-1);
|
||||
parityWd = 0;
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue