diff --git a/armsrc/Makefile b/armsrc/Makefile index 0e15a4034..343fd4202 100644 --- a/armsrc/Makefile +++ b/armsrc/Makefile @@ -12,6 +12,7 @@ APP_INCLUDES = apps.h #in the next section to remove that particular feature from compilation. # NO space,TABs after the "\" sign. APP_CFLAGS = -DWITH_CRC \ + -DWITH_ISO18092 \ -DON_DEVICE \ -DWITH_LF \ -DWITH_HITAG \ @@ -21,20 +22,21 @@ APP_CFLAGS = -DWITH_CRC \ -DWITH_ISO14443a \ -DWITH_ICLASS \ -DWITH_HFSNOOP \ - -DWITH_LF_SAMYRUN \ + -DWITH_HF_YOUNG \ -fno-strict-aliasing -ffunction-sections -fdata-sections + ### IMPORTANT - move the commented variable below this line # -DWITH_LCD \ # -DWITH_EMV \ # # Standalone Mods #------------------------------------------------------- -# -DWITH_LF_ICERUN -# -DWITH_LF_SAMYRUN -# -DWITH_LF_PROXBRUTE -# -DWITH_LF_HIDCORP -# -DWITH_HF_YOUNG -# -DWITH_HF_MATTYRUN +# -DWITH_LF_ICERUN +# -DWITH_LF_SAMYRUN +# -DWITH_LF_PROXBRUTE +# -DWITH_LF_HIDCORP +# -DWITH_HF_YOUNG +# -DWITH_HF_MATTYRUN SRC_LCD = fonts.c LCD.c @@ -51,7 +53,7 @@ SRC_FLASH = flash.c SRC_BEE = bee.c #the FPGA bitstream files. Note: order matters! -FPGA_BITSTREAMS = fpga_lf.bit fpga_hf.bit +FPGA_BITSTREAMS = fpga_lf.bit fpga_hf.bit fpga_nfc.bit #the zlib source files required for decompressing the fpga config at run time SRC_ZLIB = inflate.c inffast.c inftrees.c adler32.c zutil.c @@ -93,9 +95,8 @@ ARMSRC = fpgaloader.c \ parity.c \ usb_cdc.c \ cmd.c \ - lf_samyrun.c \ -# hf_young.c - + hf_young.c + # lf_samyrun.c \ # Do not move this inclusion before the definition of {THUMB,ASM,ARM}SRC include ../common/Makefile.common diff --git a/armsrc/fpgaloader.h b/armsrc/fpgaloader.h index 1b4f83b07..9e1b31cbe 100644 --- a/armsrc/fpgaloader.h +++ b/armsrc/fpgaloader.h @@ -35,10 +35,11 @@ void SetAdcMuxFor(uint32_t whichGpio); extern void switch_off(); // definitions for multiple FPGA config files support -#define FPGA_BITSTREAM_MAX 2 // the total number of FPGA bitstreams (configs) +#define FPGA_BITSTREAM_MAX 3 // the total number of FPGA bitstreams (configs) #define FPGA_BITSTREAM_ERR 0 #define FPGA_BITSTREAM_LF 1 #define FPGA_BITSTREAM_HF 2 +#define FPGA_BITSTREAM_NFC 3 // Definitions for the FPGA commands. #define FPGA_CMD_SET_CONFREG (1<<12) @@ -55,6 +56,7 @@ extern void switch_off(); #define FPGA_MAJOR_MODE_HF_SIMULATOR (2<<5) #define FPGA_MAJOR_MODE_HF_ISO14443A (3<<5) #define FPGA_MAJOR_MODE_HF_SNOOP (4<<5) +#define FPGA_MAJOR_MODE_HF_FELICA (5<<5) // BOTH #define FPGA_MAJOR_MODE_OFF (7<<5) // Options for LF_ADC