mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-21 13:53:55 -07:00
chg: moved flash mem config for spi into flashmem.c
chg: fpgasendcommand, now waits until command has been sent to fpga.
This commit is contained in:
iceman1001
parent
35bdf6a58d
commit
a21ab49f14
6 changed files with 231 additions and 86 deletions
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@ -6,24 +6,144 @@
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extern void Dbprintf(const char *fmt, ...);
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static void FlashSetup() {
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// PA1 -> SPI_NCS3 chip select (MEM)
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// PA12 -> SPI_MISO Master-In Slave-Out
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// PA13 -> SPI_MOSI Master-Out Slave-In
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// PA14 -> SPI_SPCK Serial Clock
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// Disable PIO control of the following pins, allows use by the SPI peripheral
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AT91C_BASE_PIOA->PIO_PDR =
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GPIO_NCS2 |
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GPIO_MISO |
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GPIO_MOSI |
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GPIO_SPCK;
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// Peripheral A
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AT91C_BASE_PIOA->PIO_ASR =
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GPIO_NCS2 |
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GPIO_MISO |
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GPIO_MOSI |
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GPIO_SPCK;
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//enable the SPI Peripheral clock
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AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_SPI);
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// Enable SPI
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AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIEN;
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// SPI Mode register
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AT91C_BASE_SPI->SPI_MR =
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((0 << 24)& AT91C_SPI_DLYBCS) | // DLYBCS, Delay between chip selects (take default: 6 MCK periods)
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((1 << 16)& AT91C_SPI_PCS) | // PCS, Peripheral Chip Select (selects PA1)
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((0 << 7) & AT91C_SPI_LLB) | // Local Loopback Disabled
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((1 << 4) & AT91C_SPI_MODFDIS) | // Mode Fault Detection disabled
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((0 << 2) & AT91C_SPI_PCSDEC) | // Chip selects connected directly to peripheral
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((0 << 1) & AT91C_SPI_PS_FIXED) | // PS, Fixed Peripheral Select
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((1 << 0) & AT91C_SPI_MSTR); // MSTR, Master Mode
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// SPI Chip select register
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AT91C_BASE_SPI->SPI_CSR[0] =
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((1 << 24)& AT91C_SPI_DLYBCT) | // Delay between Consecutive Transfers (32 MCK periods)
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((1 << 16)& AT91C_SPI_DLYBS) | // Delay Before SPCK (1 MCK period)
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((6 << 8) & AT91C_SPI_SCBR) | // Serial Clock Baud Rate (baudrate = MCK/6 = 24Mhz/6 = 4M baud
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(AT91C_SPI_BITS_8 & AT91C_SPI_BITS) | // Bits per Transfer (8 bits)
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((0 << 3) & AT91C_SPI_CSAAT) | // CSAAT, Chip Select inactive after transfer
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((1 << 1) & AT91C_SPI_NCPHA) | // NCPHA, Clock Phase data captured on leading edge, changes on following edge
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((0 << 0) & AT91C_SPI_CPOL); // CPOL, Clock Polarity inactive state is logic 0
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}
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static void FlashInit() {
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SetupSpi(SPI_MEM_MODE);
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NCS_3_LOW;
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StartTicks();
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LED_A_ON();
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FlashSetup();
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NCS_2_LOW;
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WaitUS(100);
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Dbprintf("FlashInit");
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}
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static void FlashStop(){
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NCS_3_HIGH;
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NCS_2_HIGH;
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StopTicks();
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Dbprintf("FlashStop");
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}
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static void FlashSend(uint16_t data) {
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Dbprintf("FlashSend");
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LED_A_OFF();
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// 9th bit set for data, clear for command
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while ((AT91C_BASE_SPI->SPI_SR & AT91C_SPI_TXEMPTY) == 0); // wait for the transfer to complete
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// For clarity's sake we pass data with 9th bit clear and commands with 9th
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// bit set since they're implemented as defines, se we need to invert bit
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AT91C_BASE_SPI->SPI_TDR = data ^ 0x100; // Send the data/command
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//* Reset all the Chip Select register
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AT91C_BASE_SPI->SPI_CSR[0] = 0;
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// AT91C_BASE_SPI->SPI_CSR[1] = 0;
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// AT91C_BASE_SPI->SPI_CSR[2] = 0;
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// AT91C_BASE_SPI->SPI_CSR[3] = 0;
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// Reset the SPI mode
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AT91C_BASE_SPI->SPI_MR = 0;
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// Disable all interrupts
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AT91C_BASE_SPI->SPI_IDR = 0xFFFFFFFF;
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// SPI disable
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AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIDIS;
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}
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// The chip select lines used when sending data.
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// These values are loaded into the SPI Transmit Data Register (TDR) when sending data.
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/*
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static const U32 SPI_TXRX_CS0 = BIT19 | BIT18 | BIT17 ;
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static const U32 SPI_TXRX_CS1 = BIT19 | BIT18 | BIT16;
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static const U32 SPI_TXRX_CS2 = BIT19 | BIT17 | BIT16;
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static const U32 SPI_TXRX_CS3 = BIT18 | BIT17 | BIT16;
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*/
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/*
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Fixed = you manage the CS lines
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Variable = SPI module manages the CS lines
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const UINT32 PCS_CS2 = 0x00030000;
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const UINT32 PCS_LASTTXFER = 0x01000000;
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UINT32 temp;
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temp = dataToSend;
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temp |= PCS_CS2;
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if(lastByte == true)
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{
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temp |= PCS_LASTTXFER;
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}
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SPI_TDR = temp;
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*/
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// 1. variable chip select (PS=1) ChipSelect number is written to TDR in EVERY transfer
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// 2. fixed chip select (PS=0),
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static uint8_t FlashSend(uint16_t data) {
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// wait for the transfer to complete
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while ((AT91C_BASE_SPI->SPI_SR & AT91C_SPI_TXEMPTY) == 0) {};
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// send data
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AT91C_BASE_SPI->SPI_TDR = data;
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// wait for the recieving data
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while (!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RDRF)) {};
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//return MISO_VALUE;
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return AT91C_BASE_SPI->SPI_RDR & 0xFF;
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/*
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SCK_LOW;
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NCS_2_LOW;
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for (uint8_t i = 0; i < 8; i++) {
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SCK_LOW;
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WaitUS(2);
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if (data & 0x80) {
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MOSI_HIGH;
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} else {
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MOSI_LOW;
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WaitUS(2);
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}
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data <<= 1;
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SCK_HIGH;
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tmp = tmp << 1 | MISO_VALUE;
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}
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SCK_LOW;
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return tmp;
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*/
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}
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static uint8_t FlashWriteRead(uint8_t data){
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FlashSend(READDATA);
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@ -35,6 +155,7 @@ static void FlashWrite_Enable(){
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FlashWriteRead(WRITEENABLE);
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Dbprintf("Flash WriteEnabled");
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}
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/*
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static uint8_t FlashRead(uint8_t *address, uint16_t len) {
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FlashSend(READDATA);
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for (uint16_t i = 0; i < len; i++) {
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@ -43,20 +164,61 @@ static uint8_t FlashRead(uint8_t *address, uint16_t len) {
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uint8_t tmp = FlashWriteRead(0XFF);
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return tmp;
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}
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*/
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uint8_t Flash_ReadID(void) {
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// Manufacture ID / device ID
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uint8_t t0 = FlashSend(ID);
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uint8_t t1 = FlashSend(0x00);
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uint8_t t2 = FlashSend(0x00);
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uint8_t t3 = FlashSend(0x00);
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uint8_t man_id = MISO_VALUE;
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uint8_t dev_id = MISO_VALUE;
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Dbprintf(" [%02x] %02x %02x %02x | %02x %02x", t0,t1,t2,t3, man_id, dev_id);
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//WINBOND_MANID
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if ( man_id == WINBOND_MANID ) {
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Dbprintf("Correct read of Manucaturer ID [%02x] == %02x", man_id, WINBOND_MANID);
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}
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if ( dev_id > 0) {
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Dbprintf("Got a device ID [%02x] == %02x ( 0x11 0x30 0x12", dev_id, WINBOND_DEVID);
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}
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uint8_t foo[8];
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// Read unique ID number UNIQUE_ID (0x4B)
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FlashSend(UNIQUE_ID);
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FlashSend(0x00);
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FlashSend(0x00);
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FlashSend(0x00);
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FlashSend(0x00);
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for (int i = 0; i< sizeof(foo); i++) {
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foo[i] = MISO_VALUE;
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}
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NCS_2_HIGH;
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return 0;
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}
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void EXFLASH_TEST(void) {
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uint8_t a[3] = {0x00,0x00,0x00};
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//uint8_t b[3] = {0x00,0x01,0x02};
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uint8_t d = 0;
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//uint8_t a[3] = {0x00,0x00,0x00};
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//uint8_t b[3] = {0x00,0x01,0x02};
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//uint8_t d = 0;
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FlashInit();
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FlashWrite_Enable();
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//Dbprintf("write 012 to 0x00 0x01 0x02");
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Flash_ReadID();
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//Dbprintf("Flash test write: 012 to 0x00 0x01 0x02");
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//EXFLASH_Program(a, b, sizeof(b));
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d = FlashRead(a, sizeof(a));
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Dbprintf("%02x | %02x %02x %02x", d, a[0], a[1], a[2]);
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//d = FlashRead(a, sizeof(a));
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//Dbprintf("%02x | %02x %02x %02x", d, a[0], a[1], a[2]);
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FlashStop();
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cmd_send(CMD_ACK, 1, 0, 0, 0,0);
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@ -66,7 +228,7 @@ void EXFLASH_TEST(void) {
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uint8_t EXFLASH_spi_write_read(uint8_t wData) {
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uint8_t tmp = 0;
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SCK_LOW;
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NCS_3_LOW;
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NCS_2_LOW;
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for (uint8_t i = 0; i < 8; i++) {
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SCK_LOW;
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@ -91,7 +253,7 @@ uint8_t EXFLASH_readStat1(void) {
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uint8_t stat1 = 3;
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EXFLASH_spi_write_read(READSTAT1);
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stat1 = EXFLASH_spi_write_read(0xFF);
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NCS_3_HIGH;
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NCS_2_HIGH;
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return stat1;
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}
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@ -99,7 +261,7 @@ uint8_t EXFLASH_readStat2(void) {
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uint8_t stat2;
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EXFLASH_spi_write_read(READSTAT2);
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stat2 = EXFLASH_spi_write_read(0xFF);
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NCS_3_HIGH;
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NCS_2_HIGH;
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return stat2;
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}
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@ -117,7 +279,7 @@ bool EXFLASH_NOTBUSY(void) {
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void EXFLASH_Write_Enable(void) {
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EXFLASH_spi_write_read(WRITEENABLE);
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NCS_3_HIGH;
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NCS_2_HIGH;
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}
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uint8_t EXFLASH_Read(uint8_t *address, uint16_t len) {
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@ -131,7 +293,7 @@ uint8_t EXFLASH_Read(uint8_t *address, uint16_t len) {
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EXFLASH_spi_write_read(address[i]);
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}
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tmp = EXFLASH_spi_write_read(0XFF);
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NCS_3_HIGH;
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NCS_2_HIGH;
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return tmp;
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}
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@ -157,7 +319,7 @@ uint8_t EXFLASH_Program(uint8_t address[], uint8_t *array, uint8_t len) {
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EXFLASH_spi_write_read(array[i]);
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}
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NCS_3_HIGH;
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NCS_2_HIGH;
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return true;
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}
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@ -174,7 +336,7 @@ uint8_t EXFLASH_ReadID(void) {
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ManID = EXFLASH_spi_write_read(0xff);
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// DevID = EXFLASH_spi_write_read(0xff);
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NCS_3_HIGH;
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NCS_2_HIGH;
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return ManID;
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}
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@ -192,7 +354,7 @@ bool EXFLASH_Erase(void) {
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} while ((state1 & WRTEN) != WRTEN);
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EXFLASH_spi_write_read(CHIPERASE);
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NCS_3_HIGH;
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NCS_2_HIGH;
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return true;
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}
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@ -200,7 +362,7 @@ bool EXFLASH_Reset(void) {
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LED_A_ON();
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SetupSpi(SPI_MEM_MODE);
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NCS_3_LOW;
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NCS_2_LOW;
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if (!EXFLASH_NOTBUSY()) {
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LED_A_OFF();
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@ -209,9 +371,9 @@ bool EXFLASH_Reset(void) {
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}
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EXFLASH_spi_write_read(ENABLE_RESET);
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NCS_3_HIGH;
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NCS_2_HIGH;
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EXFLASH_spi_write_read(RESET);
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NCS_3_HIGH;
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NCS_2_HIGH;
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SpinDelayUs(10);
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LED_A_OFF();
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return true;
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