Fix typos

Thanks to Debian lintian for the reports:
I: proxmark3: spelling-error-in-binary usr/bin/proxmark3 formated formatted
I: proxmark3: spelling-error-in-binary usr/bin/proxmark3 succesfully successfully
I: proxmark3: spelling-error-in-binary usr/bin/proxmark3 Skiped Skipped
I: proxmark3: spelling-error-in-binary usr/bin/proxmark3 standart standard
I: proxmark3: spelling-error-in-binary usr/bin/proxmark3 supress suppress
I: proxmark3: spelling-error-in-binary usr/bin/proxmark3 successfull successful
I: proxmark3: spelling-error-in-binary usr/bin/proxmark3 Succeded Succeeded
I: proxmark3: spelling-error-in-binary usr/bin/proxmark3 Overriden Overridden
I: proxmark3: spelling-error-in-binary usr/bin/proxmark3 aquire acquire
I: proxmark3: spelling-error-in-binary usr/bin/proxmark3 occured occurred
I: proxmark3: spelling-error-in-binary usr/bin/proxmark3 delimeter delimiter
This commit is contained in:
Ludovic Rousseau 2019-09-14 17:44:58 +02:00
commit a1852eaa4b
30 changed files with 73 additions and 73 deletions

View file

@ -598,10 +598,10 @@ typedef struct _AT91S_RSTC {
#define AT91C_RSTC_RSTTYP (0x7 << 8) // (RSTC) Reset Type
#define AT91C_RSTC_RSTTYP_POWERUP (0x0 << 8) // (RSTC) Power-up Reset. VDDCORE rising.
#define AT91C_RSTC_RSTTYP_WAKEUP (0x1 << 8) // (RSTC) WakeUp Reset. VDDCORE rising.
#define AT91C_RSTC_RSTTYP_WATCHDOG (0x2 << 8) // (RSTC) Watchdog Reset. Watchdog overflow occured.
#define AT91C_RSTC_RSTTYP_WATCHDOG (0x2 << 8) // (RSTC) Watchdog Reset. Watchdog overflow occurred.
#define AT91C_RSTC_RSTTYP_SOFTWARE (0x3 << 8) // (RSTC) Software Reset. Processor reset required by the software.
#define AT91C_RSTC_RSTTYP_USER (0x4 << 8) // (RSTC) User Reset. NRST pin detected low.
#define AT91C_RSTC_RSTTYP_BROWNOUT (0x5 << 8) // (RSTC) Brownout Reset occured.
#define AT91C_RSTC_RSTTYP_BROWNOUT (0x5 << 8) // (RSTC) Brownout Reset occurred.
#define AT91C_RSTC_NRSTL (0x1 << 16) // (RSTC) NRST pin level
#define AT91C_RSTC_SRCMP (0x1 << 17) // (RSTC) Software Reset Command in Progress.
// -------- RSTC_RMR : (RSTC Offset: 0x8) Reset Mode Register --------