mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-20 13:23:51 -07:00
ADD: @pwpivi 's latest fixes for bigbuff
ADD: @marshmellow 14b changes. fix: fixes to the timing inside iso14443b.c sniff/sending. Between TX & RX there should be a 151us pause.
This commit is contained in:
parent
c830303d7e
commit
99cf19d9e8
12 changed files with 153 additions and 143 deletions
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@ -4,7 +4,14 @@ This project uses the changelog in accordance with [keepchangelog](http://keepac
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## [Unreleased][unreleased]
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## [Unreleased][unreleased]
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### Changed
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- Changed lf config's `threshold` to a graph (signed) metric and it will trigger on + or - value set to. (example: set to 50 and recording would begin at first graphed value of >= 50 or <= -50) (marshmellow)
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- Changed `hf 14b write` to `hf 14b sriwrite` as it only applied to sri tags (marshmellow)
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- Added `hf 14b reader` to `hf search` (marshmellow)
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### Added
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### Added
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- Add `hf 14b reader` to find and print general info about known 14b tags (marshmellow)
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- Add `hf 14b info` to find and print full info about std 14b tags and sri tags (using 14b raw commands in the client) (marshmellow)
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- Add PACE replay functionality (frederikmoellers)
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- Add PACE replay functionality (frederikmoellers)
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### Fixed
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### Fixed
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@ -96,9 +96,6 @@ uint16_t BigBuf_max_traceLen(void)
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}
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}
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void clear_trace() {
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void clear_trace() {
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uint8_t *trace = BigBuf_get_addr();
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uint16_t max_traceLen = BigBuf_max_traceLen();
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memset(trace, 0x44, max_traceLen);
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traceLen = 0;
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traceLen = 0;
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}
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}
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@ -171,12 +168,8 @@ bool RAMFUNC LogTrace(const uint8_t *btBytes, uint16_t iLen, uint32_t timestamp_
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traceLen += iLen;
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traceLen += iLen;
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// parity bytes
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// parity bytes
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if (iLen != 0) {
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if (parity != NULL && iLen != 0) {
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if (parity != NULL) {
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memcpy(trace + traceLen, parity, num_paritybytes);
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memcpy(trace + traceLen, parity, num_paritybytes);
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} else {
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memset(trace + traceLen, 0x00, num_paritybytes);
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}
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}
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}
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traceLen += num_paritybytes;
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traceLen += num_paritybytes;
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@ -225,8 +218,6 @@ int LogTraceHitag(const uint8_t * btBytes, int iBits, int iSamples, uint32_t dwP
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return TRUE;
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return TRUE;
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}
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}
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// Emulator memory
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// Emulator memory
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uint8_t emlSet(uint8_t *data, uint32_t offset, uint32_t length){
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uint8_t emlSet(uint8_t *data, uint32_t offset, uint32_t length){
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uint8_t* mem = BigBuf_get_EM_addr();
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uint8_t* mem = BigBuf_get_EM_addr();
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@ -436,6 +436,8 @@ void FpgaDownloadAndGo(int bitstream_version)
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}
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}
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inflateEnd(&compressed_fpga_stream);
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inflateEnd(&compressed_fpga_stream);
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BigBuf_free();
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}
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}
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@ -16,10 +16,10 @@
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// (c) 2012 Roel Verdult
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// (c) 2012 Roel Verdult
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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#include "../include/proxmark3.h"
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#include "proxmark3.h"
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#include "apps.h"
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#include "apps.h"
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#include "util.h"
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#include "util.h"
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#include "../include/hitag2.h"
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#include "hitag2.h"
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#include "string.h"
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#include "string.h"
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#include "BigBuf.h"
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#include "BigBuf.h"
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@ -710,22 +710,24 @@ void SnoopHitag(uint32_t type) {
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byte_t rx[HITAG_FRAME_LEN];
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byte_t rx[HITAG_FRAME_LEN];
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size_t rxlen=0;
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size_t rxlen=0;
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auth_table_len = 0;
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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auth_table_pos = 0;
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BigBuf_free();
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auth_table = (byte_t *)BigBuf_malloc(AUTH_TABLE_LENGTH);
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memset(auth_table, 0x00, AUTH_TABLE_LENGTH);
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// Clean up trace and prepare it for storing frames
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// Clean up trace and prepare it for storing frames
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set_tracing(TRUE);
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set_tracing(TRUE);
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clear_trace();
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clear_trace();
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auth_table_len = 0;
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auth_table_pos = 0;
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BigBuf_free();
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auth_table = (byte_t *)BigBuf_malloc(AUTH_TABLE_LENGTH);
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memset(auth_table, 0x00, AUTH_TABLE_LENGTH);
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DbpString("Starting Hitag2 snoop");
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DbpString("Starting Hitag2 snoop");
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LED_D_ON();
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LED_D_ON();
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// Set up eavesdropping mode, frequency divisor which will drive the FPGA
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// Set up eavesdropping mode, frequency divisor which will drive the FPGA
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// and analog mux selection.
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// and analog mux selection.
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_TOGGLE_MODE);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_TOGGLE_MODE);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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@ -922,6 +924,12 @@ void SimulateHitagTag(bool tag_mem_supplied, byte_t* data) {
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bool bQuitTraceFull = false;
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bool bQuitTraceFull = false;
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bQuiet = false;
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bQuiet = false;
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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// Clean up trace and prepare it for storing frames
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set_tracing(TRUE);
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clear_trace();
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auth_table_len = 0;
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auth_table_len = 0;
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auth_table_pos = 0;
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auth_table_pos = 0;
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byte_t* auth_table;
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byte_t* auth_table;
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@ -929,10 +937,6 @@ void SimulateHitagTag(bool tag_mem_supplied, byte_t* data) {
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auth_table = (byte_t *)BigBuf_malloc(AUTH_TABLE_LENGTH);
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auth_table = (byte_t *)BigBuf_malloc(AUTH_TABLE_LENGTH);
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memset(auth_table, 0x00, AUTH_TABLE_LENGTH);
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memset(auth_table, 0x00, AUTH_TABLE_LENGTH);
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// Clean up trace and prepare it for storing frames
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set_tracing(TRUE);
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clear_trace();
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DbpString("Starting Hitag2 simulation");
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DbpString("Starting Hitag2 simulation");
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LED_D_ON();
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LED_D_ON();
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hitag2_init();
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hitag2_init();
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@ -953,7 +957,6 @@ void SimulateHitagTag(bool tag_mem_supplied, byte_t* data) {
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// Set up simulator mode, frequency divisor which will drive the FPGA
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// Set up simulator mode, frequency divisor which will drive the FPGA
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// and analog mux selection.
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// and analog mux selection.
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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@ -36,7 +36,7 @@
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//
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//
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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#include "../include/proxmark3.h"
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#include "proxmark3.h"
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#include "apps.h"
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#include "apps.h"
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#include "util.h"
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#include "util.h"
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#include "string.h"
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#include "string.h"
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// Needed for CRC in emulation mode;
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// Needed for CRC in emulation mode;
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// same construction as in ISO 14443;
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// same construction as in ISO 14443;
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// different initial value (CRC_ICLASS)
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// different initial value (CRC_ICLASS)
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#include "../common/iso14443crc.h"
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#include "iso14443crc.h"
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#include "../common/iso15693tools.h"
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#include "iso15693tools.h"
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//#include "iso15693tools.h"
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#include "protocols.h"
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#include "protocols.h"
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#include "optimized_cipher.h"
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#include "optimized_cipher.h"
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@ -633,6 +632,8 @@ static RAMFUNC int ManchesterDecoding(int v)
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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void RAMFUNC SnoopIClass(void)
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void RAMFUNC SnoopIClass(void)
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{
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{
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// We won't start recording the frames that we acquire until we trigger;
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// We won't start recording the frames that we acquire until we trigger;
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// a good trigger condition to get started is probably when we see a
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// a good trigger condition to get started is probably when we see a
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// response from the tag.
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// response from the tag.
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@ -1124,7 +1125,6 @@ int doIClassSimulation( int simulationMode, uint8_t *reader_mac_buf)
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int resp_cc_len;
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int resp_cc_len;
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uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
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uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
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memset(receivedCmd, 0x44, MAX_FRAME_SIZE);
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int len;
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int len;
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// Prepare card messages
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// Prepare card messages
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@ -1335,7 +1335,6 @@ int doIClassSimulation( int simulationMode, uint8_t *reader_mac_buf)
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}
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}
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}
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}
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memset(receivedCmd, 0x44, MAX_FRAME_SIZE);
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}
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}
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//Dbprintf("%x", cmdsRecvd);
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//Dbprintf("%x", cmdsRecvd);
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LEDsoff();
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LEDsoff();
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// We won't start recording the frames that we acquire until we trigger;
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// a good trigger condition to get started is probably when we see a
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iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
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// response from the tag.
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// triggered == FALSE -- to wait first for card
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bool triggered = !(param & 0x03);
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// Allocate memory from BigBuf for some buffers
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// Allocate memory from BigBuf for some buffers
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// free all previous allocations first
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// free all previous allocations first
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@ -600,8 +597,6 @@ void RAMFUNC SniffIso14443a(uint8_t param) {
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bool TagIsActive = FALSE;
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bool TagIsActive = FALSE;
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bool ReaderIsActive = FALSE;
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bool ReaderIsActive = FALSE;
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iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
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// Set up the demodulator for tag -> reader responses.
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// Set up the demodulator for tag -> reader responses.
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DemodInit(receivedResponse, receivedResponsePar);
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DemodInit(receivedResponse, receivedResponsePar);
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@ -611,6 +606,12 @@ void RAMFUNC SniffIso14443a(uint8_t param) {
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// Setup and start DMA.
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// Setup and start DMA.
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FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
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FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
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// We won't start recording the frames that we acquire until we trigger;
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// a good trigger condition to get started is probably when we see a
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// response from the tag.
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// triggered == FALSE -- to wait first for card
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bool triggered = !(param & 0x03);
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// And now we loop, receiving samples.
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// And now we loop, receiving samples.
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for(uint32_t rsamples = 0; TRUE; ) {
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for(uint32_t rsamples = 0; TRUE; ) {
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}
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}
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/* And ready to receive another command. */
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/* And ready to receive another command. */
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UartReset();
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UartReset();
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//UartInit(receivedCmd, receivedCmdPar);
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/* And also reset the demod code, which might have been */
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/* And also reset the demod code, which might have been */
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/* false-triggered by the commands from the reader. */
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/* false-triggered by the commands from the reader. */
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DemodReset();
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DemodReset();
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.modulation_n = 0
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.modulation_n = 0
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};
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};
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// We need to listen to the high-frequency, peak-detected path.
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iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
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BigBuf_free_keep_EM();
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BigBuf_free_keep_EM();
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// allocate buffers:
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// allocate buffers:
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@ -1120,9 +1123,6 @@ void SimulateIso14443aTag(int tagType, int flags, int uid_2nd, byte_t* data)
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int happened2 = 0;
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int happened2 = 0;
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int cmdsRecvd = 0;
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int cmdsRecvd = 0;
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// We need to listen to the high-frequency, peak-detected path.
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iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
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cmdsRecvd = 0;
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cmdsRecvd = 0;
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tag_response_info_t* p_response;
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tag_response_info_t* p_response;
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@ -2210,6 +2210,10 @@ void ReaderMifare(bool first_try)
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uint8_t receivedAnswer[MAX_MIFARE_FRAME_SIZE];
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uint8_t receivedAnswer[MAX_MIFARE_FRAME_SIZE];
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uint8_t receivedAnswerPar[MAX_MIFARE_PARITY_SIZE];
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uint8_t receivedAnswerPar[MAX_MIFARE_PARITY_SIZE];
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if (first_try) {
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iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
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}
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// free eventually allocated BigBuf memory. We want all for tracing.
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// free eventually allocated BigBuf memory. We want all for tracing.
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BigBuf_free();
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BigBuf_free();
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@ -2238,7 +2242,6 @@ void ReaderMifare(bool first_try)
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if (first_try) {
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if (first_try) {
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mf_nr_ar3 = 0;
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mf_nr_ar3 = 0;
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iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
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sync_time = GetCountSspClk() & 0xfffffff8;
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sync_time = GetCountSspClk() & 0xfffffff8;
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sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
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sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
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nt_attacked = 0;
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nt_attacked = 0;
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@ -2397,9 +2400,11 @@ void ReaderMifare(bool first_try)
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cmd_send(CMD_ACK,isOK,0,0,buf,28);
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cmd_send(CMD_ACK,isOK,0,0,buf,28);
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set_tracing(FALSE);
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// Thats it...
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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LEDsoff();
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LEDsoff();
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set_tracing(FALSE);
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}
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}
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@ -2456,13 +2461,6 @@ void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *
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uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0,0};
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uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0,0};
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uint8_t ar_nr_collected = 0;
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uint8_t ar_nr_collected = 0;
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// free eventually allocated BigBuf memory but keep Emulator Memory
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BigBuf_free_keep_EM();
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// clear trace
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clear_trace();
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set_tracing(TRUE);
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// Authenticate response - nonce
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// Authenticate response - nonce
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uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
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uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
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@ -2509,10 +2507,6 @@ void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *
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rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
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rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
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}
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}
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// We need to listen to the high-frequency, peak-detected path.
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|
||||||
iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
|
|
||||||
|
|
||||||
|
|
||||||
if (MF_DBGLEVEL >= 1) {
|
if (MF_DBGLEVEL >= 1) {
|
||||||
if (!_7BUID) {
|
if (!_7BUID) {
|
||||||
Dbprintf("4B UID: %02x%02x%02x%02x",
|
Dbprintf("4B UID: %02x%02x%02x%02x",
|
||||||
|
@ -2524,6 +2518,17 @@ void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// We need to listen to the high-frequency, peak-detected path.
|
||||||
|
iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
|
||||||
|
|
||||||
|
// free eventually allocated BigBuf memory but keep Emulator Memory
|
||||||
|
BigBuf_free_keep_EM();
|
||||||
|
|
||||||
|
// clear trace
|
||||||
|
clear_trace();
|
||||||
|
set_tracing(TRUE);
|
||||||
|
|
||||||
|
|
||||||
bool finished = FALSE;
|
bool finished = FALSE;
|
||||||
while (!BUTTON_PRESS() && !finished) {
|
while (!BUTTON_PRESS() && !finished) {
|
||||||
WDT_HIT();
|
WDT_HIT();
|
||||||
|
@ -2935,9 +2940,6 @@ void RAMFUNC SniffMifare(uint8_t param) {
|
||||||
// bit 0 - trigger from first card answer
|
// bit 0 - trigger from first card answer
|
||||||
// bit 1 - trigger from first reader 7-bit request
|
// bit 1 - trigger from first reader 7-bit request
|
||||||
|
|
||||||
// free eventually allocated BigBuf memory
|
|
||||||
BigBuf_free();
|
|
||||||
|
|
||||||
// C(red) A(yellow) B(green)
|
// C(red) A(yellow) B(green)
|
||||||
LEDsoff();
|
LEDsoff();
|
||||||
// init trace buffer
|
// init trace buffer
|
||||||
|
@ -2953,6 +2955,10 @@ void RAMFUNC SniffMifare(uint8_t param) {
|
||||||
uint8_t receivedResponse[MAX_MIFARE_FRAME_SIZE];
|
uint8_t receivedResponse[MAX_MIFARE_FRAME_SIZE];
|
||||||
uint8_t receivedResponsePar[MAX_MIFARE_PARITY_SIZE];
|
uint8_t receivedResponsePar[MAX_MIFARE_PARITY_SIZE];
|
||||||
|
|
||||||
|
iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
|
||||||
|
|
||||||
|
// free eventually allocated BigBuf memory
|
||||||
|
BigBuf_free();
|
||||||
// allocate the DMA buffer, used to stream samples from the FPGA
|
// allocate the DMA buffer, used to stream samples from the FPGA
|
||||||
uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
|
uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
|
||||||
uint8_t *data = dmaBuf;
|
uint8_t *data = dmaBuf;
|
||||||
|
@ -2962,8 +2968,6 @@ void RAMFUNC SniffMifare(uint8_t param) {
|
||||||
bool ReaderIsActive = FALSE;
|
bool ReaderIsActive = FALSE;
|
||||||
bool TagIsActive = FALSE;
|
bool TagIsActive = FALSE;
|
||||||
|
|
||||||
iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
|
|
||||||
|
|
||||||
// Set up the demodulator for tag -> reader responses.
|
// Set up the demodulator for tag -> reader responses.
|
||||||
DemodInit(receivedResponse, receivedResponsePar);
|
DemodInit(receivedResponse, receivedResponsePar);
|
||||||
|
|
||||||
|
@ -3043,7 +3047,6 @@ void RAMFUNC SniffMifare(uint8_t param) {
|
||||||
if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break;
|
if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break;
|
||||||
|
|
||||||
/* And ready to receive another command. */
|
/* And ready to receive another command. */
|
||||||
//UartInit(receivedCmd, receivedCmdPar);
|
|
||||||
UartReset();
|
UartReset();
|
||||||
|
|
||||||
/* And also reset the demod code */
|
/* And also reset the demod code */
|
||||||
|
|
|
@ -321,9 +321,6 @@ static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len)
|
||||||
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
||||||
void SimulateIso14443bTag(void)
|
void SimulateIso14443bTag(void)
|
||||||
{
|
{
|
||||||
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
|
|
||||||
BigBuf_free();
|
|
||||||
|
|
||||||
// the only commands we understand is REQB, AFI=0, Select All, N=0:
|
// the only commands we understand is REQB, AFI=0, Select All, N=0:
|
||||||
static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
|
static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
|
||||||
// ... and REQB, AFI=0, Normal Request, N=0:
|
// ... and REQB, AFI=0, Normal Request, N=0:
|
||||||
|
@ -337,22 +334,26 @@ void SimulateIso14443bTag(void)
|
||||||
0x00, 0x21, 0x85, 0x5e, 0xd7
|
0x00, 0x21, 0x85, 0x5e, 0xd7
|
||||||
};
|
};
|
||||||
|
|
||||||
|
uint8_t parity[MAX_PARITY_SIZE];
|
||||||
|
|
||||||
|
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
|
||||||
|
|
||||||
clear_trace();
|
clear_trace();
|
||||||
set_tracing(TRUE);
|
set_tracing(TRUE);
|
||||||
|
|
||||||
const uint8_t *resp;
|
const uint8_t *resp;
|
||||||
uint8_t *respCode;
|
uint8_t *respCode;
|
||||||
uint16_t respLen, respCodeLen;
|
uint16_t respLen, respCodeLen;
|
||||||
|
|
||||||
|
// allocate command receive buffer
|
||||||
|
BigBuf_free();
|
||||||
|
uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
|
||||||
|
|
||||||
uint16_t len;
|
uint16_t len;
|
||||||
uint16_t cmdsRecvd = 0;
|
uint16_t cmdsRecvd = 0;
|
||||||
|
|
||||||
|
|
||||||
// allocate command receive buffer
|
|
||||||
uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
|
|
||||||
|
|
||||||
// prepare the (only one) tag answer:
|
// prepare the (only one) tag answer:
|
||||||
CodeIso14443bAsTag(response1, sizeof(response1));
|
CodeIso14443bAsTag(response1, sizeof(response1));
|
||||||
|
|
||||||
uint8_t *resp1Code = BigBuf_malloc(ToSendMax);
|
uint8_t *resp1Code = BigBuf_malloc(ToSendMax);
|
||||||
memcpy(resp1Code, ToSend, ToSendMax);
|
memcpy(resp1Code, ToSend, ToSendMax);
|
||||||
uint16_t resp1CodeLen = ToSendMax;
|
uint16_t resp1CodeLen = ToSendMax;
|
||||||
|
@ -371,7 +372,6 @@ void SimulateIso14443bTag(void)
|
||||||
}
|
}
|
||||||
|
|
||||||
if (tracing) {
|
if (tracing) {
|
||||||
uint8_t parity[MAX_PARITY_SIZE];
|
|
||||||
LogTrace(receivedCmd, len, 0, 0, parity, TRUE);
|
LogTrace(receivedCmd, len, 0, 0, parity, TRUE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -444,12 +444,9 @@ void SimulateIso14443bTag(void)
|
||||||
}
|
}
|
||||||
|
|
||||||
// trace the response:
|
// trace the response:
|
||||||
if (tracing) {
|
if (tracing) LogTrace(resp, respLen, 0, 0, parity, FALSE);
|
||||||
uint8_t parity[MAX_PARITY_SIZE];
|
|
||||||
LogTrace(resp, respLen, 0, 0, parity, FALSE);
|
|
||||||
}
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
//FpgaDisableSscDma();
|
||||||
}
|
}
|
||||||
|
|
||||||
//=============================================================================
|
//=============================================================================
|
||||||
|
@ -728,13 +725,13 @@ static void GetSamplesFor14443bDemod(int n, bool quiet)
|
||||||
BigBuf_free();
|
BigBuf_free();
|
||||||
|
|
||||||
// The response (tag -> reader) that we're receiving.
|
// The response (tag -> reader) that we're receiving.
|
||||||
uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE);
|
uint8_t *resp = BigBuf_malloc(MAX_FRAME_SIZE);
|
||||||
|
|
||||||
// The DMA buffer, used to stream samples from the FPGA
|
// The DMA buffer, used to stream samples from the FPGA
|
||||||
int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE);
|
int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE);
|
||||||
|
|
||||||
// Set up the demodulator for tag -> reader responses.
|
// Set up the demodulator for tag -> reader responses.
|
||||||
DemodInit(receivedResponse);
|
DemodInit(resp);
|
||||||
|
|
||||||
// Setup and start DMA.
|
// Setup and start DMA.
|
||||||
FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE);
|
FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE);
|
||||||
|
@ -746,6 +743,7 @@ static void GetSamplesFor14443bDemod(int n, bool quiet)
|
||||||
LED_D_ON();
|
LED_D_ON();
|
||||||
// And put the FPGA in the appropriate mode
|
// And put the FPGA in the appropriate mode
|
||||||
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
|
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
|
||||||
|
SpinDelayUs(151); // T0 time between reader send, tag answer. 151us.
|
||||||
|
|
||||||
for(;;) {
|
for(;;) {
|
||||||
int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR;
|
int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR;
|
||||||
|
@ -922,6 +920,7 @@ static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len)
|
||||||
void ReadSTMemoryIso14443b(uint32_t dwLast)
|
void ReadSTMemoryIso14443b(uint32_t dwLast)
|
||||||
{
|
{
|
||||||
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
|
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
|
||||||
|
BigBuf_free();
|
||||||
|
|
||||||
clear_trace();
|
clear_trace();
|
||||||
set_tracing(TRUE);
|
set_tracing(TRUE);
|
||||||
|
@ -932,6 +931,8 @@ void ReadSTMemoryIso14443b(uint32_t dwLast)
|
||||||
// confusing things will happen if we don't reset them between reads.
|
// confusing things will happen if we don't reset them between reads.
|
||||||
LED_D_OFF();
|
LED_D_OFF();
|
||||||
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
|
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
|
||||||
|
SpinDelay(200);
|
||||||
|
|
||||||
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
|
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
|
||||||
FpgaSetupSsc();
|
FpgaSetupSsc();
|
||||||
|
|
||||||
|
@ -1169,8 +1170,8 @@ void RAMFUNC SnoopIso14443b(void)
|
||||||
//Use samples as a time measurement
|
//Use samples as a time measurement
|
||||||
if(tracing)
|
if(tracing)
|
||||||
{
|
{
|
||||||
uint8_t parity[MAX_PARITY_SIZE];
|
//uint8_t parity[MAX_PARITY_SIZE];
|
||||||
LogTrace(Demod.output, Demod.len, samples, samples, parity, FALSE);
|
LogTrace(Demod.output, Demod.len, samples, samples, parity, FALSE);
|
||||||
}
|
}
|
||||||
triggered = TRUE;
|
triggered = TRUE;
|
||||||
|
|
||||||
|
@ -1213,9 +1214,12 @@ void SendRawCommand14443B(uint32_t datalen, uint32_t recv, uint8_t powerfield, u
|
||||||
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
|
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
|
||||||
FpgaSetupSsc();
|
FpgaSetupSsc();
|
||||||
|
|
||||||
set_tracing(TRUE);
|
if ( datalen == 0 && recv == 0 && powerfield == 0){
|
||||||
|
clear_trace();
|
||||||
CodeAndTransmit14443bAsReader(data, datalen);
|
} else {
|
||||||
|
set_tracing(TRUE);
|
||||||
|
CodeAndTransmit14443bAsReader(data, datalen);
|
||||||
|
}
|
||||||
|
|
||||||
if(recv) {
|
if(recv) {
|
||||||
GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
|
GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
|
||||||
|
@ -1227,5 +1231,7 @@ void SendRawCommand14443B(uint32_t datalen, uint32_t recv, uint8_t powerfield, u
|
||||||
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
|
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
|
||||||
LED_D_OFF();
|
LED_D_OFF();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
FpgaDisableSscDma();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -877,12 +877,12 @@ int SendDataTag(uint8_t *send, int sendlen, int init, int speed, uint8_t **recv)
|
||||||
LED_C_OFF();
|
LED_C_OFF();
|
||||||
LED_D_OFF();
|
LED_D_OFF();
|
||||||
|
|
||||||
|
if (init) Iso15693InitReader();
|
||||||
|
|
||||||
int answerLen=0;
|
int answerLen=0;
|
||||||
uint8_t *answer = BigBuf_get_addr() + 3660;
|
uint8_t *answer = BigBuf_get_addr() + 3660;
|
||||||
if (recv != NULL) memset(answer, 0, 100);
|
if (recv != NULL) memset(answer, 0, 100);
|
||||||
|
|
||||||
if (init) Iso15693InitReader();
|
|
||||||
|
|
||||||
if (!speed) {
|
if (!speed) {
|
||||||
// low speed (1 out of 256)
|
// low speed (1 out of 256)
|
||||||
CodeIso15693AsReader256(send, sendlen);
|
CodeIso15693AsReader256(send, sendlen);
|
||||||
|
@ -999,10 +999,6 @@ void ReaderIso15693(uint32_t parameter)
|
||||||
LED_C_OFF();
|
LED_C_OFF();
|
||||||
LED_D_OFF();
|
LED_D_OFF();
|
||||||
|
|
||||||
uint8_t *answer1 = BigBuf_get_addr() + 3660;
|
|
||||||
uint8_t *answer2 = BigBuf_get_addr() + 3760;
|
|
||||||
uint8_t *answer3 = BigBuf_get_addr() + 3860;
|
|
||||||
|
|
||||||
int answerLen1 = 0;
|
int answerLen1 = 0;
|
||||||
int answerLen2 = 0;
|
int answerLen2 = 0;
|
||||||
int answerLen3 = 0;
|
int answerLen3 = 0;
|
||||||
|
@ -1013,12 +1009,14 @@ void ReaderIso15693(uint32_t parameter)
|
||||||
int elapsed = 0;
|
int elapsed = 0;
|
||||||
uint8_t TagUID[8] = {0x00};
|
uint8_t TagUID[8] = {0x00};
|
||||||
|
|
||||||
|
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
|
||||||
|
|
||||||
|
uint8_t *answer1 = BigBuf_get_addr() + 3660;
|
||||||
|
uint8_t *answer2 = BigBuf_get_addr() + 3760;
|
||||||
|
uint8_t *answer3 = BigBuf_get_addr() + 3860;
|
||||||
// Blank arrays
|
// Blank arrays
|
||||||
memset(answer1, 0x00, 300);
|
memset(answer1, 0x00, 300);
|
||||||
|
|
||||||
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
|
|
||||||
|
|
||||||
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
|
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
|
||||||
// Setup SSC
|
// Setup SSC
|
||||||
FpgaSetupSsc();
|
FpgaSetupSsc();
|
||||||
|
@ -1111,20 +1109,18 @@ void SimTagIso15693(uint32_t parameter, uint8_t *uid)
|
||||||
LED_C_OFF();
|
LED_C_OFF();
|
||||||
LED_D_OFF();
|
LED_D_OFF();
|
||||||
|
|
||||||
uint8_t *buf = BigBuf_get_addr() + 3660;
|
|
||||||
|
|
||||||
int answerLen1 = 0;
|
int answerLen1 = 0;
|
||||||
int samples = 0;
|
int samples = 0;
|
||||||
int tsamples = 0;
|
int tsamples = 0;
|
||||||
int wait = 0;
|
int wait = 0;
|
||||||
int elapsed = 0;
|
int elapsed = 0;
|
||||||
|
|
||||||
memset(buf, 0x00, 100);
|
|
||||||
|
|
||||||
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
|
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
|
||||||
|
|
||||||
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
|
uint8_t *buf = BigBuf_get_addr() + 3660;
|
||||||
|
memset(buf, 0x00, 100);
|
||||||
|
|
||||||
|
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
|
||||||
FpgaSetupSsc();
|
FpgaSetupSsc();
|
||||||
|
|
||||||
// Start from off (no field generated)
|
// Start from off (no field generated)
|
||||||
|
|
|
@ -119,7 +119,6 @@ void LFSetupFPGAForADC(int divisor, bool lf_field)
|
||||||
* @param silent - is true, now outputs are made. If false, dbprints the status
|
* @param silent - is true, now outputs are made. If false, dbprints the status
|
||||||
* @return the number of bits occupied by the samples.
|
* @return the number of bits occupied by the samples.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
uint32_t DoAcquisition(uint8_t decimation, uint32_t bits_per_sample, bool averaging, int trigger_threshold,bool silent)
|
uint32_t DoAcquisition(uint8_t decimation, uint32_t bits_per_sample, bool averaging, int trigger_threshold,bool silent)
|
||||||
{
|
{
|
||||||
//.
|
//.
|
||||||
|
@ -151,7 +150,8 @@ uint32_t DoAcquisition(uint8_t decimation, uint32_t bits_per_sample, bool averag
|
||||||
if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
|
if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
|
||||||
sample = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
|
sample = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
|
||||||
LED_D_OFF();
|
LED_D_OFF();
|
||||||
if (trigger_threshold > 0 && sample < trigger_threshold)
|
// threshold either high or low values 128 = center 0. if trigger = 178
|
||||||
|
if ((trigger_threshold > 0) && (sample < (trigger_threshold+128)) && (sample > (128-trigger_threshold))) //
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
trigger_threshold = 0;
|
trigger_threshold = 0;
|
||||||
|
|
|
@ -39,10 +39,10 @@ void MifareReadBlock(uint8_t arg0, uint8_t arg1, uint8_t arg2, uint8_t *datain)
|
||||||
struct Crypto1State *pcs;
|
struct Crypto1State *pcs;
|
||||||
pcs = &mpcs;
|
pcs = &mpcs;
|
||||||
|
|
||||||
// clear trace
|
|
||||||
clear_trace();
|
|
||||||
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
||||||
|
|
||||||
|
clear_trace();
|
||||||
|
|
||||||
LED_A_ON();
|
LED_A_ON();
|
||||||
LED_B_OFF();
|
LED_B_OFF();
|
||||||
LED_C_OFF();
|
LED_C_OFF();
|
||||||
|
@ -90,9 +90,11 @@ void MifareUC_Auth(uint8_t arg0, uint8_t *keybytes){
|
||||||
bool turnOffField = (arg0 == 1);
|
bool turnOffField = (arg0 == 1);
|
||||||
|
|
||||||
LED_A_ON(); LED_B_OFF(); LED_C_OFF();
|
LED_A_ON(); LED_B_OFF(); LED_C_OFF();
|
||||||
clear_trace();
|
|
||||||
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
||||||
|
|
||||||
|
clear_trace();
|
||||||
|
|
||||||
if(!iso14443a_select_card(NULL, NULL, NULL)) {
|
if(!iso14443a_select_card(NULL, NULL, NULL)) {
|
||||||
if (MF_DBGLEVEL >= MF_DBG_ERROR) Dbprintf("Can't select card");
|
if (MF_DBGLEVEL >= MF_DBG_ERROR) Dbprintf("Can't select card");
|
||||||
OnError(0);
|
OnError(0);
|
||||||
|
@ -124,9 +126,10 @@ void MifareUReadBlock(uint8_t arg0, uint8_t arg1, uint8_t *datain)
|
||||||
|
|
||||||
LEDsoff();
|
LEDsoff();
|
||||||
LED_A_ON();
|
LED_A_ON();
|
||||||
clear_trace();
|
|
||||||
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
||||||
|
|
||||||
|
clear_trace();
|
||||||
|
|
||||||
int len = iso14443a_select_card(NULL, NULL, NULL);
|
int len = iso14443a_select_card(NULL, NULL, NULL);
|
||||||
if(!len) {
|
if(!len) {
|
||||||
if (MF_DBGLEVEL >= MF_DBG_ERROR) Dbprintf("Can't select card (RC:%02X)",len);
|
if (MF_DBGLEVEL >= MF_DBG_ERROR) Dbprintf("Can't select card (RC:%02X)",len);
|
||||||
|
@ -194,11 +197,10 @@ void MifareReadSector(uint8_t arg0, uint8_t arg1, uint8_t arg2, uint8_t *datain)
|
||||||
struct Crypto1State *pcs;
|
struct Crypto1State *pcs;
|
||||||
pcs = &mpcs;
|
pcs = &mpcs;
|
||||||
|
|
||||||
// clear trace
|
|
||||||
clear_trace();
|
|
||||||
|
|
||||||
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
||||||
|
|
||||||
|
clear_trace();
|
||||||
|
|
||||||
LED_A_ON();
|
LED_A_ON();
|
||||||
LED_B_OFF();
|
LED_B_OFF();
|
||||||
LED_C_OFF();
|
LED_C_OFF();
|
||||||
|
@ -247,6 +249,10 @@ void MifareReadSector(uint8_t arg0, uint8_t arg1, uint8_t arg2, uint8_t *datain)
|
||||||
// datain = KEY bytes
|
// datain = KEY bytes
|
||||||
void MifareUReadCard(uint8_t arg0, uint16_t arg1, uint8_t arg2, uint8_t *datain)
|
void MifareUReadCard(uint8_t arg0, uint16_t arg1, uint8_t arg2, uint8_t *datain)
|
||||||
{
|
{
|
||||||
|
LEDsoff();
|
||||||
|
LED_A_ON();
|
||||||
|
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
||||||
|
|
||||||
// free eventually allocated BigBuf memory
|
// free eventually allocated BigBuf memory
|
||||||
BigBuf_free();
|
BigBuf_free();
|
||||||
clear_trace();
|
clear_trace();
|
||||||
|
@ -264,10 +270,6 @@ void MifareUReadCard(uint8_t arg0, uint16_t arg1, uint8_t arg2, uint8_t *datain)
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
LEDsoff();
|
|
||||||
LED_A_ON();
|
|
||||||
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
|
||||||
|
|
||||||
int len = iso14443a_select_card(NULL, NULL, NULL);
|
int len = iso14443a_select_card(NULL, NULL, NULL);
|
||||||
if (!len) {
|
if (!len) {
|
||||||
if (MF_DBGLEVEL >= MF_DBG_ERROR) Dbprintf("Can't select card (RC:%d)",len);
|
if (MF_DBGLEVEL >= MF_DBG_ERROR) Dbprintf("Can't select card (RC:%d)",len);
|
||||||
|
@ -361,11 +363,10 @@ void MifareWriteBlock(uint8_t arg0, uint8_t arg1, uint8_t arg2, uint8_t *datain)
|
||||||
struct Crypto1State *pcs;
|
struct Crypto1State *pcs;
|
||||||
pcs = &mpcs;
|
pcs = &mpcs;
|
||||||
|
|
||||||
// clear trace
|
|
||||||
clear_trace();
|
|
||||||
|
|
||||||
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
||||||
|
|
||||||
|
clear_trace();
|
||||||
|
|
||||||
LED_A_ON();
|
LED_A_ON();
|
||||||
LED_B_OFF();
|
LED_B_OFF();
|
||||||
LED_C_OFF();
|
LED_C_OFF();
|
||||||
|
@ -467,9 +468,10 @@ void MifareUWriteBlock(uint8_t arg0, uint8_t arg1, uint8_t *datain)
|
||||||
|
|
||||||
LEDsoff();
|
LEDsoff();
|
||||||
LED_A_ON();
|
LED_A_ON();
|
||||||
clear_trace();
|
|
||||||
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
||||||
|
|
||||||
|
clear_trace();
|
||||||
|
|
||||||
if(!iso14443a_select_card(NULL, NULL, NULL)) {
|
if(!iso14443a_select_card(NULL, NULL, NULL)) {
|
||||||
if (MF_DBGLEVEL >= 1) Dbprintf("Can't select card");
|
if (MF_DBGLEVEL >= 1) Dbprintf("Can't select card");
|
||||||
OnError(0);
|
OnError(0);
|
||||||
|
@ -525,9 +527,10 @@ void MifareUSetPwd(uint8_t arg0, uint8_t *datain){
|
||||||
memcpy(pwd, datain, 16);
|
memcpy(pwd, datain, 16);
|
||||||
|
|
||||||
LED_A_ON(); LED_B_OFF(); LED_C_OFF();
|
LED_A_ON(); LED_B_OFF(); LED_C_OFF();
|
||||||
clear_trace();
|
|
||||||
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
||||||
|
|
||||||
|
clear_trace();
|
||||||
|
|
||||||
if(!iso14443a_select_card(NULL, NULL, NULL)) {
|
if(!iso14443a_select_card(NULL, NULL, NULL)) {
|
||||||
if (MF_DBGLEVEL >= 1) Dbprintf("Can't select card");
|
if (MF_DBGLEVEL >= 1) Dbprintf("Can't select card");
|
||||||
OnError(0);
|
OnError(0);
|
||||||
|
@ -627,17 +630,15 @@ void MifareNested(uint32_t arg0, uint32_t arg1, uint32_t calibrate, uint8_t *dat
|
||||||
uint32_t auth1_time, auth2_time;
|
uint32_t auth1_time, auth2_time;
|
||||||
static uint16_t delta_time;
|
static uint16_t delta_time;
|
||||||
|
|
||||||
// free eventually allocated BigBuf memory
|
|
||||||
BigBuf_free();
|
|
||||||
// clear trace
|
|
||||||
clear_trace();
|
|
||||||
set_tracing(false);
|
|
||||||
|
|
||||||
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
|
||||||
|
|
||||||
LED_A_ON();
|
LED_A_ON();
|
||||||
LED_C_OFF();
|
LED_C_OFF();
|
||||||
|
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
||||||
|
|
||||||
|
// free eventually allocated BigBuf memory
|
||||||
|
BigBuf_free();
|
||||||
|
|
||||||
|
clear_trace();
|
||||||
|
set_tracing(false);
|
||||||
|
|
||||||
// statistics on nonce distance
|
// statistics on nonce distance
|
||||||
int16_t isOK = 0;
|
int16_t isOK = 0;
|
||||||
|
@ -842,15 +843,13 @@ void MifareChkKeys(uint8_t arg0, uint8_t arg1, uint8_t arg2, uint8_t *datain)
|
||||||
int OLD_MF_DBGLEVEL = MF_DBGLEVEL;
|
int OLD_MF_DBGLEVEL = MF_DBGLEVEL;
|
||||||
MF_DBGLEVEL = MF_DBG_NONE;
|
MF_DBGLEVEL = MF_DBG_NONE;
|
||||||
|
|
||||||
// clear trace
|
|
||||||
clear_trace();
|
|
||||||
set_tracing(TRUE);
|
|
||||||
|
|
||||||
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
|
||||||
|
|
||||||
LED_A_ON();
|
LED_A_ON();
|
||||||
LED_B_OFF();
|
LED_B_OFF();
|
||||||
LED_C_OFF();
|
LED_C_OFF();
|
||||||
|
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
||||||
|
|
||||||
|
clear_trace();
|
||||||
|
set_tracing(TRUE);
|
||||||
|
|
||||||
for (i = 0; i < keyCount; i++) {
|
for (i = 0; i < keyCount; i++) {
|
||||||
if(mifare_classic_halt(pcs, cuid)) {
|
if(mifare_classic_halt(pcs, cuid)) {
|
||||||
|
@ -897,16 +896,23 @@ void MifareSetDbgLvl(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datai
|
||||||
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
||||||
// Work with emulator memory
|
// Work with emulator memory
|
||||||
//
|
//
|
||||||
|
// Note: we call FpgaDownloadAndGo(FPGA_BITSTREAM_HF) here although FPGA is not
|
||||||
|
// involved in dealing with emulator memory. But if it is called later, it might
|
||||||
|
// destroy the Emulator Memory.
|
||||||
//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
|
||||||
|
|
||||||
void MifareEMemClr(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain){
|
void MifareEMemClr(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain){
|
||||||
|
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
|
||||||
emlClearMem();
|
emlClearMem();
|
||||||
}
|
}
|
||||||
|
|
||||||
void MifareEMemSet(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain){
|
void MifareEMemSet(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain){
|
||||||
|
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
|
||||||
emlSetMem(datain, arg0, arg1); // data, block num, blocks count
|
emlSetMem(datain, arg0, arg1); // data, block num, blocks count
|
||||||
}
|
}
|
||||||
|
|
||||||
void MifareEMemGet(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain){
|
void MifareEMemGet(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain){
|
||||||
|
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
|
||||||
byte_t buf[USB_CMD_DATA_SIZE];
|
byte_t buf[USB_CMD_DATA_SIZE];
|
||||||
emlGetMem(buf, arg0, arg1); // data, block num, blocks count (max 4)
|
emlGetMem(buf, arg0, arg1); // data, block num, blocks count (max 4)
|
||||||
|
|
||||||
|
@ -933,15 +939,13 @@ void MifareECardLoad(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datai
|
||||||
byte_t dataoutbuf2[16];
|
byte_t dataoutbuf2[16];
|
||||||
uint8_t uid[10];
|
uint8_t uid[10];
|
||||||
|
|
||||||
// clear trace
|
|
||||||
clear_trace();
|
|
||||||
set_tracing(false);
|
|
||||||
|
|
||||||
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
|
||||||
|
|
||||||
LED_A_ON();
|
LED_A_ON();
|
||||||
LED_B_OFF();
|
LED_B_OFF();
|
||||||
LED_C_OFF();
|
LED_C_OFF();
|
||||||
|
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
||||||
|
|
||||||
|
clear_trace();
|
||||||
|
set_tracing(false);
|
||||||
|
|
||||||
bool isOK = true;
|
bool isOK = true;
|
||||||
|
|
||||||
|
@ -1035,10 +1039,10 @@ void MifareCSetBlock(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datai
|
||||||
LED_A_ON();
|
LED_A_ON();
|
||||||
LED_B_OFF();
|
LED_B_OFF();
|
||||||
LED_C_OFF();
|
LED_C_OFF();
|
||||||
|
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
||||||
|
|
||||||
clear_trace();
|
clear_trace();
|
||||||
set_tracing(TRUE);
|
set_tracing(TRUE);
|
||||||
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
while (true) {
|
while (true) {
|
||||||
|
@ -1153,10 +1157,10 @@ void MifareCGetBlock(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datai
|
||||||
LED_A_ON();
|
LED_A_ON();
|
||||||
LED_B_OFF();
|
LED_B_OFF();
|
||||||
LED_C_OFF();
|
LED_C_OFF();
|
||||||
|
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
||||||
|
|
||||||
clear_trace();
|
clear_trace();
|
||||||
set_tracing(TRUE);
|
set_tracing(TRUE);
|
||||||
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
while (true) {
|
while (true) {
|
||||||
|
@ -1250,9 +1254,10 @@ void MifareCollectNonces(uint32_t arg0, uint32_t arg1){
|
||||||
LED_B_OFF();
|
LED_B_OFF();
|
||||||
LED_C_OFF();
|
LED_C_OFF();
|
||||||
|
|
||||||
|
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
||||||
clear_trace();
|
clear_trace();
|
||||||
set_tracing(TRUE);
|
set_tracing(TRUE);
|
||||||
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
|
||||||
|
|
||||||
for (int i = 0; i < iterations; i++) {
|
for (int i = 0; i < iterations; i++) {
|
||||||
|
|
||||||
|
@ -1308,8 +1313,8 @@ void Mifare_DES_Auth1(uint8_t arg0, uint8_t *datain){
|
||||||
uint8_t uid[10] = {0x00};
|
uint8_t uid[10] = {0x00};
|
||||||
uint32_t cuid = 0x00;
|
uint32_t cuid = 0x00;
|
||||||
|
|
||||||
clear_trace();
|
|
||||||
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
||||||
|
clear_trace();
|
||||||
|
|
||||||
int len = iso14443a_select_card(uid, NULL, &cuid);
|
int len = iso14443a_select_card(uid, NULL, &cuid);
|
||||||
if(!len) {
|
if(!len) {
|
||||||
|
|
|
@ -20,12 +20,11 @@ static uint8_t deselect_cmd[] = {0xc2,0xe0,0xb4};
|
||||||
|
|
||||||
bool InitDesfireCard(){
|
bool InitDesfireCard(){
|
||||||
|
|
||||||
byte_t cardbuf[USB_CMD_DATA_SIZE] = {0x00};
|
|
||||||
|
|
||||||
iso14a_card_select_t *card = (iso14a_card_select_t*)cardbuf;
|
|
||||||
|
|
||||||
set_tracing(TRUE);
|
|
||||||
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
|
||||||
|
set_tracing(TRUE);
|
||||||
|
|
||||||
|
byte_t cardbuf[USB_CMD_DATA_SIZE] = {0x00};
|
||||||
|
iso14a_card_select_t *card = (iso14a_card_select_t*)cardbuf;
|
||||||
|
|
||||||
int len = iso14443a_select_card(NULL,card,NULL);
|
int len = iso14443a_select_card(NULL,card,NULL);
|
||||||
|
|
||||||
|
|
|
@ -65,7 +65,6 @@
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
#include <stdbool.h>
|
#include <stdbool.h>
|
||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
#include <time.h>
|
|
||||||
|
|
||||||
|
|
||||||
#define opt_T(s) (0x1 & ((s->t >> 15) ^ (s->t >> 14)^ (s->t >> 10)^ (s->t >> 8)^ (s->t >> 5)^ (s->t >> 4)^ (s->t >> 1)^ s->t))
|
#define opt_T(s) (0x1 & ((s->t >> 15) ^ (s->t >> 14)^ (s->t >> 10)^ (s->t >> 8)^ (s->t >> 5)^ (s->t >> 4)^ (s->t >> 1)^ s->t))
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue