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ADD: @pwpivi 's latest fixes for bigbuff
ADD: @marshmellow 14b changes. fix: fixes to the timing inside iso14443b.c sniff/sending. Between TX & RX there should be a 151us pause.
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12 changed files with 153 additions and 143 deletions
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@ -877,12 +877,12 @@ int SendDataTag(uint8_t *send, int sendlen, int init, int speed, uint8_t **recv)
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LED_C_OFF();
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LED_D_OFF();
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if (init) Iso15693InitReader();
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int answerLen=0;
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uint8_t *answer = BigBuf_get_addr() + 3660;
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if (recv != NULL) memset(answer, 0, 100);
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if (init) Iso15693InitReader();
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if (!speed) {
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// low speed (1 out of 256)
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CodeIso15693AsReader256(send, sendlen);
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@ -999,10 +999,6 @@ void ReaderIso15693(uint32_t parameter)
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LED_C_OFF();
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LED_D_OFF();
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uint8_t *answer1 = BigBuf_get_addr() + 3660;
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uint8_t *answer2 = BigBuf_get_addr() + 3760;
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uint8_t *answer3 = BigBuf_get_addr() + 3860;
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int answerLen1 = 0;
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int answerLen2 = 0;
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int answerLen3 = 0;
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@ -1013,12 +1009,14 @@ void ReaderIso15693(uint32_t parameter)
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int elapsed = 0;
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uint8_t TagUID[8] = {0x00};
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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uint8_t *answer1 = BigBuf_get_addr() + 3660;
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uint8_t *answer2 = BigBuf_get_addr() + 3760;
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uint8_t *answer3 = BigBuf_get_addr() + 3860;
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// Blank arrays
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memset(answer1, 0x00, 300);
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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// Setup SSC
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FpgaSetupSsc();
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@ -1111,20 +1109,18 @@ void SimTagIso15693(uint32_t parameter, uint8_t *uid)
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LED_C_OFF();
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LED_D_OFF();
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uint8_t *buf = BigBuf_get_addr() + 3660;
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int answerLen1 = 0;
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int samples = 0;
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int tsamples = 0;
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int wait = 0;
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int elapsed = 0;
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memset(buf, 0x00, 100);
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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uint8_t *buf = BigBuf_get_addr() + 3660;
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memset(buf, 0x00, 100);
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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FpgaSetupSsc();
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// Start from off (no field generated)
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