mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-14 18:48:13 -07:00
Merge branch 'master' of https://github.com/Proxmark/proxmark3
Conflicts: armsrc/lfops.c client/cmddata.c client/graph.c
This commit is contained in:
commit
952a8bb59b
10 changed files with 17283 additions and 848 deletions
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@ -18,8 +18,8 @@
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/**
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* Does the sample acquisition. If threshold is specified, the actual sampling
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* is not commenced until the threshold has been reached.
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* Does the sample acquisition. If threshold is specified, the actual sampling
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* is not commenced until the threshold has been reached.
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* @param trigger_threshold - the threshold
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* @param silent - is true, now outputs are made. If false, dbprints the status
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*/
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@ -54,7 +54,7 @@ void DoAcquisition125k_internal(int trigger_threshold,bool silent)
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}
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}
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/**
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* Perform sample aquisition.
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* Perform sample aquisition.
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*/
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void DoAcquisition125k(int trigger_threshold)
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{
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@ -62,11 +62,11 @@ void DoAcquisition125k(int trigger_threshold)
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}
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/**
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* Setup the FPGA to listen for samples. This method downloads the FPGA bitstream
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* if not already loaded, sets divisor and starts up the antenna.
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* Setup the FPGA to listen for samples. This method downloads the FPGA bitstream
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* if not already loaded, sets divisor and starts up the antenna.
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* @param divisor : 1, 88> 255 or negative ==> 134.8 KHz
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* 0 or 95 ==> 125 KHz
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*
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*
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**/
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void LFSetupFPGAForADC(int divisor, bool lf_field)
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{
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@ -88,7 +88,7 @@ void LFSetupFPGAForADC(int divisor, bool lf_field)
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FpgaSetupSsc();
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}
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/**
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* Initializes the FPGA, and acquires the samples.
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* Initializes the FPGA, and acquires the samples.
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**/
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void AcquireRawAdcSamples125k(int divisor)
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{
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@ -97,7 +97,7 @@ void AcquireRawAdcSamples125k(int divisor)
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DoAcquisition125k_internal(-1,false);
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}
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/**
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* Initializes the FPGA for snoop-mode, and acquires the samples.
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* Initializes the FPGA for snoop-mode, and acquires the samples.
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**/
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void SnoopLFRawAdcSamples(int divisor, int trigger_threshold)
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@ -173,13 +173,12 @@ void ReadTItag(void)
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// when we read a TI tag we sample the zerocross line at 2Mhz
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// TI tags modulate a 1 as 16 cycles of 123.2Khz
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// TI tags modulate a 0 as 16 cycles of 134.2Khz
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#define FSAMPLE 2000000
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#define FREQLO 123200
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#define FREQHI 134200
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#define FSAMPLE 2000000
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#define FREQLO 123200
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#define FREQHI 134200
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signed char *dest = (signed char *)BigBuf;
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int n = sizeof(BigBuf);
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// 128 bit shift register [shift3:shift2:shift1:shift0]
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uint32_t shift3 = 0, shift2 = 0, shift1 = 0, shift0 = 0;
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@ -261,10 +260,10 @@ void ReadTItag(void)
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shift2 = ((shift2>>24) | (shift3 << 8)) & 0x0ffff;
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// if r/w tag, check ident match
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if ( shift3&(1<<15) ) {
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if (shift3 & (1<<15) ) {
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DbpString("Info: TI tag is rewriteable");
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// only 15 bits compare, last bit of ident is not valid
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if ( ((shift3>>16)^shift0)&0x7fff ) {
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if (((shift3 >> 16) ^ shift0) & 0x7fff ) {
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DbpString("Error: Ident mismatch!");
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} else {
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DbpString("Info: TI tag ident is valid");
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@ -328,7 +327,7 @@ void AcquireTiType(void)
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int i, j, n;
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// tag transmission is <20ms, sampling at 2M gives us 40K samples max
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// each sample is 1 bit stuffed into a uint32_t so we need 1250 uint32_t
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#define TIBUFLEN 1250
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#define TIBUFLEN 1250
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// clear buffer
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memset(BigBuf,0,sizeof(BigBuf));
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@ -469,18 +468,18 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
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{
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int i;
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uint8_t *tab = (uint8_t *)BigBuf;
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
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AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK;
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AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
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AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_CLK;
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#define SHORT_COIL() LOW(GPIO_SSC_DOUT)
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#define OPEN_COIL() HIGH(GPIO_SSC_DOUT)
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i = 0;
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for(;;) {
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while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) {
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@ -490,18 +489,18 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
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}
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WDT_HIT();
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}
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if (ledcontrol)
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LED_D_ON();
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if(tab[i])
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OPEN_COIL();
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else
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SHORT_COIL();
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if (ledcontrol)
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LED_D_OFF();
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while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK) {
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if(BUTTON_PRESS()) {
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DbpString("Stopped");
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@ -509,7 +508,7 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
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}
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WDT_HIT();
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}
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i++;
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if(i == period) {
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i = 0;
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@ -623,7 +622,6 @@ void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
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if (ledcontrol)
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LED_A_ON();
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SimulateTagLowFrequency(n, 0, ledcontrol);
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if (ledcontrol)
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@ -663,30 +661,30 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
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uint8_t bitlen = 0;
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uint32_t fc = 0;
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uint32_t cardnum = 0;
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if (((hi>>5)&1)==1){//if bit 38 is set then < 37 bit format is used
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if (((hi>>5)&1) == 1){//if bit 38 is set then < 37 bit format is used
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uint32_t lo2=0;
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lo2=(((hi & 31) << 12) | (lo>>20)); //get bits 21-37 to check for format len bit
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uint8_t idx3 = 1;
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while(lo2>1){ //find last bit set to 1 (format len bit)
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lo2=lo2>>1;
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while(lo2 > 1){ //find last bit set to 1 (format len bit)
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lo2=lo2 >> 1;
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idx3++;
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}
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bitlen =idx3+19;
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bitlen = idx3+19;
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fc =0;
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cardnum=0;
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if(bitlen==26){
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if(bitlen == 26){
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cardnum = (lo>>1)&0xFFFF;
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fc = (lo>>17)&0xFF;
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}
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if(bitlen==37){
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if(bitlen == 37){
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cardnum = (lo>>1)&0x7FFFF;
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fc = ((hi&0xF)<<12)|(lo>>20);
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}
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if(bitlen==34){
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if(bitlen == 34){
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cardnum = (lo>>1)&0xFFFF;
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fc= ((hi&1)<<15)|(lo>>17);
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}
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if(bitlen==35){
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if(bitlen == 35){
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cardnum = (lo>>1)&0xFFFFF;
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fc = ((hi&1)<<11)|(lo>>21);
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}
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data1 = hi; // load preamble
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data2 = lo;
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LED_D_ON();
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// Program the data blocks for supplied ID
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// and the block 0 for HID format
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@ -1331,6 +1329,7 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
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// Clone Indala 64-bit tag by UID to T55x7
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void CopyIndala64toT55x7(int hi, int lo)
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{
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//Program the 2 data blocks for supplied 64bit UID
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// and the block 0 for Indala64 format
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T55xxWriteBlock(hi,1,0,0);
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// T5567WriteBlock(0x603E1042,0);
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DbpString("DONE!");
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}
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}
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void CopyIndala224toT55x7(int uid1, int uid2, int uid3, int uid4, int uid5, int uid6, int uid7)
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{
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//Program the 7 data blocks for supplied 224bit UID
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// and the block 0 for Indala224 format
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T55xxWriteBlock(uid1,1,0,0);
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// T5567WriteBlock(0x603E10E2,0);
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DbpString("DONE!");
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}
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