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Implemented a hf iclass sim variation

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hf iclass sim -t 3 variation that glitches specific block responses during read/write operations based on the value of the last byte of block 31.
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Antiklesys 2025-06-07 02:15:01 +08:00
commit 94794f7519
4 changed files with 35 additions and 22 deletions
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@ -3,6 +3,7 @@ All notable changes to this project will be documented in this file.
This project uses the changelog in accordance with [keepchangelog](http://keepachangelog.com/). Please use this to write notable changes, which is not the same as git commit log...
## [unreleased][unreleased]
- Changed `hf iclass sim` - implemented a sim -t 3 variation that glitches specific block responses (@antiklesys)
- Changed `hf iclass legbrute` - implemented multithreading support (@antiklesys)
- Changed `hf iclass legrec` - added a --fast option for further speed increase and automated AA2 block selection (@antiklesys)
- Changed `hf iclass legrec` - additional code optimizations gaining a ~147% speed increase (@antiklesys)