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chg t55 timings to match offical repo when compiling for PM3OTHER
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2 changed files with 25 additions and 14 deletions
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@ -52,11 +52,11 @@ SAM7S has several timers, we will use the source TIMER_CLOCK1 (aka AT91C_TC_CLKS
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TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz
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TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz
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New timer implemenation in ticks.c, which is used in LFOPS.c
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New timer implemenation in ticks.c, which is used in LFOPS.c
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1us = 1.5ticks
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1 μs = 1.5 ticks
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1fc = 8us = 12ticks
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1 fc = 8 μs = 12 ticks
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Terms you find in different datasheets and how they match.
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Terms you find in different datasheets and how they match.
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1 Cycle = 8 microseconds(us) == 1 field clock (fc)
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1 Cycle = 8 microseconds (μs) == 1 field clock (fc)
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Note about HITAG timing
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Note about HITAG timing
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Hitag units (T0) have duration of 8 microseconds (us), which is 1/125000 per second (carrier)
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Hitag units (T0) have duration of 8 microseconds (us), which is 1/125000 per second (carrier)
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@ -135,19 +135,30 @@ Initial values if not in flash
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RG = Read gap
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RG = Read gap
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Explainations for array T55xx_Timing below
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Explainations for array T55xx_Timing below
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SG WG Bit 0/00 Bit 1/01 Bit 10 Bit 11 RG
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0 1 2 3
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SG WG Bit 00 Bit 01 Bit 10 Bit 11 RG
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--------------------------------------------------------------------
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--------------------------------------------------------------------
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{ 29 , 17 , 15 , 47 , 0 , 0 , 15 }, // Default Fixed
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{ 29 , 17 , 15 , 47 , 0 , 0 , 15 }, // Default Fixed
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{ 31 , 20 , 18 , 50 , 0 , 0 , 15 }, // Long Leading Ref.
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{ 29 , 17 , 15 , 50 , 0 , 0 , 15 }, // Long Leading Ref.
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{ 31 , 20 , 18 , 40 , 0 , 0 , 15 }, // Leading 0
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{ 29 , 17 , 15 , 40 , 0 , 0 , 15 }, // Leading 0
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{ 29 , 17 , 15 , 31 , 47 , 63 , 15 } // 1 of 4
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{ 29 , 17 , 15 , 31 , 47 , 63 , 15 } // 1 of 4
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*/
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*/
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t55xx_configurations_t T55xx_Timing = {
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t55xx_configurations_t T55xx_Timing = {
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{
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{
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#ifdef WITH_FLASH
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// PM3RDV4
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{ 29 * 8, 17 * 8, 15 * 8, 47 * 8, 15 * 8, 0, 0 }, // Default Fixed
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{ 29 * 8, 17 * 8, 15 * 8, 47 * 8, 15 * 8, 0, 0 }, // Default Fixed
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{ 29 * 8, 17 * 8, 15 * 8, 47 * 8, 15 * 8, 0, 0 }, // Long Leading Ref.
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{ 29 * 8, 17 * 8, 15 * 8, 40 * 8, 15 * 8, 0, 0 }, // Leading 0
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{ 29 * 8, 17 * 8, 15 * 8, 31 * 8, 15 * 8, 47 * 8, 63 * 8 } // 1 of 4
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#else
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// PM3OTHER or like offical repo
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{ 31 * 8, 20 * 8, 18 * 8, 50 * 8, 15 * 8, 0, 0 }, // Default Fixed
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{ 31 * 8, 20 * 8, 18 * 8, 50 * 8, 15 * 8, 0, 0 }, // Long Leading Ref.
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{ 31 * 8, 20 * 8, 18 * 8, 50 * 8, 15 * 8, 0, 0 }, // Long Leading Ref.
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{ 31 * 8, 20 * 8, 18 * 8, 40 * 8, 15 * 8, 0, 0 }, // Leading 0
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{ 31 * 8, 20 * 8, 18 * 8, 40 * 8, 15 * 8, 0, 0 }, // Leading 0
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{ 29 * 8, 17 * 8, 15 * 8, 31 * 8, 15 * 8, 47 * 8, 63 * 8 } // 1 of 4
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{ 31 * 8, 20 * 8, 18 * 8, 34 * 8, 15 * 8, 50 * 8, 66 * 8 } // 1 of 4
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#endif
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}
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}
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};
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};
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@ -3582,18 +3582,18 @@ static int CmdT55xxSetDeviceConfig(const char *Cmd) {
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configurations.m[T55XX_DLMODE_FIXED].write_3 = 0;
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configurations.m[T55XX_DLMODE_FIXED].write_3 = 0;
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// long leading reference
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// long leading reference
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configurations.m[T55XX_DLMODE_LLR].start_gap = 31 * 8;
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configurations.m[T55XX_DLMODE_LLR].start_gap = 29 * 8;
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configurations.m[T55XX_DLMODE_LLR].write_gap = 20 * 8;
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configurations.m[T55XX_DLMODE_LLR].write_gap = 17 * 8;
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configurations.m[T55XX_DLMODE_LLR].write_0 = 18 * 8;
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configurations.m[T55XX_DLMODE_LLR].write_0 = 15 * 8;
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configurations.m[T55XX_DLMODE_LLR].write_1 = 50 * 8;
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configurations.m[T55XX_DLMODE_LLR].write_1 = 47 * 8;
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configurations.m[T55XX_DLMODE_LLR].read_gap = 15 * 8;
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configurations.m[T55XX_DLMODE_LLR].read_gap = 15 * 8;
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configurations.m[T55XX_DLMODE_LLR].write_2 = 0;
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configurations.m[T55XX_DLMODE_LLR].write_2 = 0;
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configurations.m[T55XX_DLMODE_LLR].write_3 = 0;
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configurations.m[T55XX_DLMODE_LLR].write_3 = 0;
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// leading zero
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// leading zero
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configurations.m[T55XX_DLMODE_LEADING_ZERO].start_gap = 31 * 8;
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configurations.m[T55XX_DLMODE_LEADING_ZERO].start_gap = 29 * 8;
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configurations.m[T55XX_DLMODE_LEADING_ZERO].write_gap = 20 * 8;
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configurations.m[T55XX_DLMODE_LEADING_ZERO].write_gap = 17 * 8;
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configurations.m[T55XX_DLMODE_LEADING_ZERO].write_0 = 18 * 8;
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configurations.m[T55XX_DLMODE_LEADING_ZERO].write_0 = 15 * 8;
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configurations.m[T55XX_DLMODE_LEADING_ZERO].write_1 = 40 * 8;
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configurations.m[T55XX_DLMODE_LEADING_ZERO].write_1 = 40 * 8;
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configurations.m[T55XX_DLMODE_LEADING_ZERO].read_gap = 15 * 8;
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configurations.m[T55XX_DLMODE_LEADING_ZERO].read_gap = 15 * 8;
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configurations.m[T55XX_DLMODE_LEADING_ZERO].write_2 = 0;
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configurations.m[T55XX_DLMODE_LEADING_ZERO].write_2 = 0;
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