chg t55 timings to match offical repo when compiling for PM3OTHER

This commit is contained in:
iceman1001 2019-11-12 19:27:34 +01:00
commit 93c9dc571f
2 changed files with 25 additions and 14 deletions

View file

@ -52,11 +52,11 @@ SAM7S has several timers, we will use the source TIMER_CLOCK1 (aka AT91C_TC_CLKS
TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz
New timer implemenation in ticks.c, which is used in LFOPS.c New timer implemenation in ticks.c, which is used in LFOPS.c
1us = 1.5ticks 1 μs = 1.5 ticks
1fc = 8us = 12ticks 1 fc = 8 μs = 12 ticks
Terms you find in different datasheets and how they match. Terms you find in different datasheets and how they match.
1 Cycle = 8 microseconds(us) == 1 field clock (fc) 1 Cycle = 8 microseconds (μs) == 1 field clock (fc)
Note about HITAG timing Note about HITAG timing
Hitag units (T0) have duration of 8 microseconds (us), which is 1/125000 per second (carrier) Hitag units (T0) have duration of 8 microseconds (us), which is 1/125000 per second (carrier)
@ -135,19 +135,30 @@ Initial values if not in flash
RG = Read gap RG = Read gap
Explainations for array T55xx_Timing below Explainations for array T55xx_Timing below
SG WG Bit 0/00 Bit 1/01 Bit 10 Bit 11 RG
0 1 2 3
SG WG Bit 00 Bit 01 Bit 10 Bit 11 RG
-------------------------------------------------------------------- --------------------------------------------------------------------
{ 29 , 17 , 15 , 47 , 0 , 0 , 15 }, // Default Fixed { 29 , 17 , 15 , 47 , 0 , 0 , 15 }, // Default Fixed
{ 31 , 20 , 18 , 50 , 0 , 0 , 15 }, // Long Leading Ref. { 29 , 17 , 15 , 50 , 0 , 0 , 15 }, // Long Leading Ref.
{ 31 , 20 , 18 , 40 , 0 , 0 , 15 }, // Leading 0 { 29 , 17 , 15 , 40 , 0 , 0 , 15 }, // Leading 0
{ 29 , 17 , 15 , 31 , 47 , 63 , 15 } // 1 of 4 { 29 , 17 , 15 , 31 , 47 , 63 , 15 } // 1 of 4
*/ */
t55xx_configurations_t T55xx_Timing = { t55xx_configurations_t T55xx_Timing = {
{ {
#ifdef WITH_FLASH
// PM3RDV4
{ 29 * 8, 17 * 8, 15 * 8, 47 * 8, 15 * 8, 0, 0 }, // Default Fixed { 29 * 8, 17 * 8, 15 * 8, 47 * 8, 15 * 8, 0, 0 }, // Default Fixed
{ 29 * 8, 17 * 8, 15 * 8, 47 * 8, 15 * 8, 0, 0 }, // Long Leading Ref.
{ 29 * 8, 17 * 8, 15 * 8, 40 * 8, 15 * 8, 0, 0 }, // Leading 0
{ 29 * 8, 17 * 8, 15 * 8, 31 * 8, 15 * 8, 47 * 8, 63 * 8 } // 1 of 4
#else
// PM3OTHER or like offical repo
{ 31 * 8, 20 * 8, 18 * 8, 50 * 8, 15 * 8, 0, 0 }, // Default Fixed
{ 31 * 8, 20 * 8, 18 * 8, 50 * 8, 15 * 8, 0, 0 }, // Long Leading Ref. { 31 * 8, 20 * 8, 18 * 8, 50 * 8, 15 * 8, 0, 0 }, // Long Leading Ref.
{ 31 * 8, 20 * 8, 18 * 8, 40 * 8, 15 * 8, 0, 0 }, // Leading 0 { 31 * 8, 20 * 8, 18 * 8, 40 * 8, 15 * 8, 0, 0 }, // Leading 0
{ 29 * 8, 17 * 8, 15 * 8, 31 * 8, 15 * 8, 47 * 8, 63 * 8 } // 1 of 4 { 31 * 8, 20 * 8, 18 * 8, 34 * 8, 15 * 8, 50 * 8, 66 * 8 } // 1 of 4
#endif
} }
}; };

View file

@ -3582,18 +3582,18 @@ static int CmdT55xxSetDeviceConfig(const char *Cmd) {
configurations.m[T55XX_DLMODE_FIXED].write_3 = 0; configurations.m[T55XX_DLMODE_FIXED].write_3 = 0;
// long leading reference // long leading reference
configurations.m[T55XX_DLMODE_LLR].start_gap = 31 * 8; configurations.m[T55XX_DLMODE_LLR].start_gap = 29 * 8;
configurations.m[T55XX_DLMODE_LLR].write_gap = 20 * 8; configurations.m[T55XX_DLMODE_LLR].write_gap = 17 * 8;
configurations.m[T55XX_DLMODE_LLR].write_0 = 18 * 8; configurations.m[T55XX_DLMODE_LLR].write_0 = 15 * 8;
configurations.m[T55XX_DLMODE_LLR].write_1 = 50 * 8; configurations.m[T55XX_DLMODE_LLR].write_1 = 47 * 8;
configurations.m[T55XX_DLMODE_LLR].read_gap = 15 * 8; configurations.m[T55XX_DLMODE_LLR].read_gap = 15 * 8;
configurations.m[T55XX_DLMODE_LLR].write_2 = 0; configurations.m[T55XX_DLMODE_LLR].write_2 = 0;
configurations.m[T55XX_DLMODE_LLR].write_3 = 0; configurations.m[T55XX_DLMODE_LLR].write_3 = 0;
// leading zero // leading zero
configurations.m[T55XX_DLMODE_LEADING_ZERO].start_gap = 31 * 8; configurations.m[T55XX_DLMODE_LEADING_ZERO].start_gap = 29 * 8;
configurations.m[T55XX_DLMODE_LEADING_ZERO].write_gap = 20 * 8; configurations.m[T55XX_DLMODE_LEADING_ZERO].write_gap = 17 * 8;
configurations.m[T55XX_DLMODE_LEADING_ZERO].write_0 = 18 * 8; configurations.m[T55XX_DLMODE_LEADING_ZERO].write_0 = 15 * 8;
configurations.m[T55XX_DLMODE_LEADING_ZERO].write_1 = 40 * 8; configurations.m[T55XX_DLMODE_LEADING_ZERO].write_1 = 40 * 8;
configurations.m[T55XX_DLMODE_LEADING_ZERO].read_gap = 15 * 8; configurations.m[T55XX_DLMODE_LEADING_ZERO].read_gap = 15 * 8;
configurations.m[T55XX_DLMODE_LEADING_ZERO].write_2 = 0; configurations.m[T55XX_DLMODE_LEADING_ZERO].write_2 = 0;