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https://github.com/RfidResearchGroup/proxmark3.git
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code clean.
This commit is contained in:
parent
39c4548bf3
commit
91dea8d694
1 changed files with 6 additions and 91 deletions
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@ -223,7 +223,6 @@ static void CodeIso15693AsReader256(uint8_t *cmd, int n) {
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static void TransmitTo15693Tag(const uint8_t *cmd, int len, int *samples, int *wait) {
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static void TransmitTo15693Tag(const uint8_t *cmd, int len, int *samples, int *wait) {
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int c;
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int c;
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volatile uint32_t r;
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX);
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if (wait) {
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if (wait) {
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@ -232,9 +231,6 @@ static void TransmitTo15693Tag(const uint8_t *cmd, int len, int *samples, int *w
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AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
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AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
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++c;
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++c;
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}
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}
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if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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r = AT91C_BASE_SSC->SSC_RHR; (void)r;
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}
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WDT_HIT();
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WDT_HIT();
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}
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}
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}
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}
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@ -245,9 +241,6 @@ static void TransmitTo15693Tag(const uint8_t *cmd, int len, int *samples, int *w
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AT91C_BASE_SSC->SSC_THR = cmd[c];
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AT91C_BASE_SSC->SSC_THR = cmd[c];
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if( ++c >= len) break;
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if( ++c >= len) break;
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}
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}
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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r = AT91C_BASE_SSC->SSC_RHR; (void)r;
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}
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WDT_HIT();
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WDT_HIT();
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}
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}
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@ -264,7 +257,6 @@ static void TransmitTo15693Tag(const uint8_t *cmd, int len, int *samples, int *w
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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static void TransmitTo15693Reader(const uint8_t *cmd, int len, int *samples, int *wait) {
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static void TransmitTo15693Reader(const uint8_t *cmd, int len, int *samples, int *wait) {
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int c = 0;
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int c = 0;
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volatile uint32_t r;
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K);
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if (wait) {
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if (wait) {
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@ -273,9 +265,6 @@ static void TransmitTo15693Reader(const uint8_t *cmd, int len, int *samples, int
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AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
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AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
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++c;
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++c;
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}
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}
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if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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r = AT91C_BASE_SSC->SSC_RHR; (void)r;
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}
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WDT_HIT();
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WDT_HIT();
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}
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}
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}
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}
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@ -286,9 +275,6 @@ static void TransmitTo15693Reader(const uint8_t *cmd, int len, int *samples, int
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AT91C_BASE_SSC->SSC_THR = cmd[c];
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AT91C_BASE_SSC->SSC_THR = cmd[c];
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if( ++c >= len) break;
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if( ++c >= len) break;
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}
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}
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if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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r = AT91C_BASE_SSC->SSC_RHR; (void)r;
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}
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WDT_HIT();
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WDT_HIT();
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}
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}
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if (samples) {
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if (samples) {
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@ -403,28 +389,12 @@ static int GetIso15693AnswerFromTag(uint8_t *received, int *elapsed) {
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uint32_t time_stop = 0;
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uint32_t time_stop = 0;
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bool getNext = false;
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bool getNext = false;
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int counter = 0, ci = 0, cq = 0;
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int counter = 0, ci = 0, cq = 0;
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//volatile uint32_t r;
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uint8_t *buf = BigBuf_malloc(SIGNAL_BUFF_SIZE);
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uint8_t *buf = BigBuf_malloc(SIGNAL_BUFF_SIZE);
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if (elapsed) *elapsed = 0;
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if (elapsed) *elapsed = 0;
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
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// for (counter = 0; counter < wait;) {
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// WDT_HIT();
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// if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
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// AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
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// counter++;
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// }
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// if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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// r = AT91C_BASE_SSC->SSC_RHR; (void)r;
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// }
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// }
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// counter = 0;
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for(;;) {
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for(;;) {
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WDT_HIT();
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WDT_HIT();
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@ -436,9 +406,6 @@ static int GetIso15693AnswerFromTag(uint8_t *received, int *elapsed) {
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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ci = (int8_t)AT91C_BASE_SSC->SSC_RHR;
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ci = (int8_t)AT91C_BASE_SSC->SSC_RHR;
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// LSB is a FPGA singal bit
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ci >>= 1;
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ci = ABS(ci);
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ci = ABS(ci);
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// The samples are correlations against I and Q versions of the
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// The samples are correlations against I and Q versions of the
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@ -483,15 +450,9 @@ static int GetIso15693AnswerFromSniff(uint8_t *received, int *samples, int *elap
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for(;;) {
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for(;;) {
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WDT_HIT();
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WDT_HIT();
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))
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AT91C_BASE_SSC->SSC_THR = 0x43;
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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ci = (int8_t)AT91C_BASE_SSC->SSC_RHR;
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ci = (int8_t)AT91C_BASE_SSC->SSC_RHR;
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// LSB is a FPGA singal bit
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ci >>= 1;
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ci = ABS(ci);
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ci = ABS(ci);
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// The samples are correlations against I and Q versions of the
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// The samples are correlations against I and Q versions of the
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@ -524,14 +485,11 @@ static int GetIso15693AnswerFromSniff(uint8_t *received, int *samples, int *elap
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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void AcquireRawAdcSamplesIso15693(void) {
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void AcquireRawAdcSamplesIso15693(void) {
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int c = 0, getNext = false;
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int c = 0, getNext = false;
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volatile uint32_t r;
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int ci = 0, cq = 0;
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int ci = 0, cq = 0;
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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FpgaSetupSsc();
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FpgaSetupSsc();
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// Give the tags time to energize
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//FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
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// Now send the command
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// Now send the command
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX);
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@ -555,9 +513,6 @@ void AcquireRawAdcSamplesIso15693(void) {
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break;
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break;
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}
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}
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}
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}
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if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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r = AT91C_BASE_SSC->SSC_RHR; (void)r;
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}
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}
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}
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@ -569,16 +524,9 @@ void AcquireRawAdcSamplesIso15693(void) {
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for(;;) {
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for(;;) {
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WDT_HIT();
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WDT_HIT();
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))
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AT91C_BASE_SSC->SSC_THR = 0x43;
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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ci = (int8_t)AT91C_BASE_SSC->SSC_RHR;
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ci = (int8_t)AT91C_BASE_SSC->SSC_RHR;
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// LSB is a FPGA singal bit
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ci >>= 1;
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ci = ABS(ci);
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ci = ABS(ci);
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// The samples are correlations against I and Q versions of the
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// The samples are correlations against I and Q versions of the
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@ -613,16 +561,9 @@ void RecordRawAdcSamplesIso15693(void) {
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for(;;) {
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for(;;) {
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WDT_HIT();
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WDT_HIT();
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if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
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AT91C_BASE_SSC->SSC_THR = 0x43;
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}
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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ci = (int8_t)AT91C_BASE_SSC->SSC_RHR;
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ci = (int8_t)AT91C_BASE_SSC->SSC_RHR;
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// LSB is a FPGA singal bit
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ci >>= 1;
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ci = ABS(ci);
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ci = ABS(ci);
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// The samples are correlations against I and Q versions of the
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// The samples are correlations against I and Q versions of the
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// tone that the tag AM-modulates, so every other sample is I,
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// tone that the tag AM-modulates, so every other sample is I,
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@ -670,8 +611,6 @@ void Iso15693InitReader(void) {
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// Start the timer
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// Start the timer
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StartCountSspClk();
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StartCountSspClk();
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if (MF_DBGLEVEL >= MF_DBG_EXTENDED ) DbpString("[+] Iso15693InitReader Exit");
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LED_A_ON();
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LED_A_ON();
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}
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}
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@ -861,8 +800,6 @@ void DbdecodeIso15693Answer(int len, uint8_t *d) {
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// parameter is unused !?!
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// parameter is unused !?!
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void ReaderIso15693(uint32_t parameter) {
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void ReaderIso15693(uint32_t parameter) {
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int answerLen1 = 0;
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int answerLen1 = 0;
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//int answerLen2 = 0;
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//int answerLen3 = 0;
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int tsamples = 0, wait = 0, elapsed = 0;
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int tsamples = 0, wait = 0, elapsed = 0;
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uint8_t uid[8] = {0,0,0,0,0,0,0,0};
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uint8_t uid[8] = {0,0,0,0,0,0,0,0};
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@ -872,11 +809,10 @@ void ReaderIso15693(uint32_t parameter) {
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uint8_t *answer1 = BigBuf_malloc(50);
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uint8_t *answer1 = BigBuf_malloc(50);
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uint8_t *answer2 = BigBuf_malloc(50);
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uint8_t *answer2 = BigBuf_malloc(50);
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//uint8_t *answer3 = BigBuf_malloc(50);
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// Blank arrays
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// Blank arrays
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memset(answer1, 0x00, 50);
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memset(answer1, 0x00, 50);
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memset(answer2, 0x00, 50);
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memset(answer2, 0x00, 50);
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//memset(answer3, 0x00, 50);
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// Now send the IDENTIFY command
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// Now send the IDENTIFY command
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// FIRST WE RUN AN INVENTORY TO GET THE TAG UID
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// FIRST WE RUN AN INVENTORY TO GET THE TAG UID
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@ -921,28 +857,6 @@ void ReaderIso15693(uint32_t parameter) {
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Dbhexdump(answerLen1, answer1, true);
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Dbhexdump(answerLen1, answer1, true);
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}
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}
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// DEBUG read all pages
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/*
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if (answerLen1 >= 12 && MF_DBGLEVEL >= MF_DBG_EXTENDED) {
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i = 0;
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while ( i < 32 ) { // sanity check, assume max 32 pages
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cmdlen = BuildReadBlockRequest(cmd, uid, i);
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TransmitTo15693Tag(ToSend, ToSendMax, &tsamples, &wait);
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LogTrace(cmd, cmdlen, time_start<<4, (GetCountSspClk()-time_start)<<4, NULL, true);
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answerLen2 = GetIso15693AnswerFromTag(answer2, &elapsed);
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if (answerLen2 > 0) {
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Dbprintf("READ SINGLE BLOCK %d returned %d octets:", i, answerLen2);
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DbdecodeIso15693Answer(answerLen2, answer2);
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Dbhexdump(answerLen2, answer2, true);
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if ( *((uint32_t*) answer2) == 0x07160101 ) break; // exit on NoPageErr
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}
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i++;
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}
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}
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*/
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switch_off();
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switch_off();
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}
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}
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@ -950,6 +864,7 @@ void ReaderIso15693(uint32_t parameter) {
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// all demodulation performed in arm rather than host. - greg
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// all demodulation performed in arm rather than host. - greg
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void SimTagIso15693(uint32_t parameter, uint8_t *uid) {
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void SimTagIso15693(uint32_t parameter, uint8_t *uid) {
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LEDsoff();
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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FpgaSetupSsc();
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FpgaSetupSsc();
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