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adapt 14b mergehell

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iceman1001 2020-08-16 21:13:10 +02:00
commit 8ff8ccb9a7
3 changed files with 339 additions and 285 deletions
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24
armsrc/epa.c
View file

@ -113,13 +113,13 @@ static char iso_type = 0;
//----------------------------------------------------------------------------- //-----------------------------------------------------------------------------
// Wrapper for sending APDUs to type A and B cards // Wrapper for sending APDUs to type A and B cards
//----------------------------------------------------------------------------- //-----------------------------------------------------------------------------
static int EPA_APDU(uint8_t *apdu, size_t length, uint8_t *response) { static int EPA_APDU(uint8_t *apdu, size_t length, uint8_t *response, uint16_t respmaxlen) {
switch (iso_type) { switch (iso_type) {
case 'a': case 'a':
return iso14_apdu(apdu, (uint16_t) length, false, response, NULL); return iso14_apdu(apdu, (uint16_t) length, false, response, NULL);
break; break;
case 'b': case 'b':
return iso14443b_apdu(apdu, length, response); return iso14443b_apdu(apdu, length, response, respmaxlen);
break; break;
default: default:
return 0; return 0;
@ -227,7 +227,9 @@ int EPA_Read_CardAccess(uint8_t *buffer, size_t max_length) {
// select the file EF.CardAccess // select the file EF.CardAccess
rapdu_length = EPA_APDU((uint8_t *)apdu_select_binary_cardaccess, rapdu_length = EPA_APDU((uint8_t *)apdu_select_binary_cardaccess,
sizeof(apdu_select_binary_cardaccess), sizeof(apdu_select_binary_cardaccess),
response_apdu); response_apdu,
sizeof(response_apdu)
);
if (rapdu_length < 6 if (rapdu_length < 6
|| response_apdu[rapdu_length - 4] != 0x90 || response_apdu[rapdu_length - 4] != 0x90
|| response_apdu[rapdu_length - 3] != 0x00) { || response_apdu[rapdu_length - 3] != 0x00) {
@ -238,7 +240,9 @@ int EPA_Read_CardAccess(uint8_t *buffer, size_t max_length) {
// read the file // read the file
rapdu_length = EPA_APDU((uint8_t *)apdu_read_binary, rapdu_length = EPA_APDU((uint8_t *)apdu_read_binary,
sizeof(apdu_read_binary), sizeof(apdu_read_binary),
response_apdu); response_apdu,
sizeof(response_apdu)
);
if (rapdu_length <= 6 if (rapdu_length <= 6
|| response_apdu[rapdu_length - 4] != 0x90 || response_apdu[rapdu_length - 4] != 0x90
|| response_apdu[rapdu_length - 3] != 0x00) { || response_apdu[rapdu_length - 3] != 0x00) {
@ -356,7 +360,9 @@ int EPA_PACE_Get_Nonce(uint8_t requested_length, uint8_t *nonce) {
uint8_t response_apdu[262]; uint8_t response_apdu[262];
int send_return = EPA_APDU(apdu, int send_return = EPA_APDU(apdu,
sizeof(apdu), sizeof(apdu),
response_apdu); response_apdu,
sizeof(response_apdu)
);
// check if the command succeeded // check if the command succeeded
if (send_return < 6 if (send_return < 6
|| response_apdu[send_return - 4] != 0x90 || response_apdu[send_return - 4] != 0x90
@ -423,7 +429,9 @@ int EPA_PACE_MSE_Set_AT(pace_version_info_t pace_version_info, uint8_t password)
uint8_t response_apdu[6]; uint8_t response_apdu[6];
int send_return = EPA_APDU(apdu, int send_return = EPA_APDU(apdu,
apdu_length, apdu_length,
response_apdu); response_apdu,
sizeof(response_apdu)
);
// check if the command succeeded // check if the command succeeded
if (send_return != 6 if (send_return != 6
|| response_apdu[send_return - 4] != 0x90 || response_apdu[send_return - 4] != 0x90
@ -480,7 +488,9 @@ void EPA_PACE_Replay(PacketCommandNG *c) {
StartCountUS(); StartCountUS();
func_return = EPA_APDU(apdus_replay[i].data, func_return = EPA_APDU(apdus_replay[i].data,
apdu_lengths_replay[i], apdu_lengths_replay[i],
response_apdu); response_apdu,
sizeof(response_apdu)
);
timings[i] = GetCountUS(); timings[i] = GetCountUS();
// every step but the last one should succeed // every step but the last one should succeed
if (i < ARRAYLEN(apdu_lengths_replay) - 1 if (i < ARRAYLEN(apdu_lengths_replay) - 1

419
armsrc/iso14443b.c
View file

@ -39,20 +39,22 @@
#define DELAY_TAG_TO_ARM_SNIFF 32 #define DELAY_TAG_TO_ARM_SNIFF 32
#define DELAY_READER_TO_ARM_SNIFF 32 #define DELAY_READER_TO_ARM_SNIFF 32
// defaults to 2000ms
#ifndef FWT_TIMEOUT_14B
# define FWT_TIMEOUT_14B 35312
#endif
// 330/848kHz = 1558us / 4 == 400us, // 330/848kHz = 1558us / 4 == 400us,
#define ISO14443B_READER_TIMEOUT 330 #define ISO14443B_READER_TIMEOUT 1700 //330
// 1024/3.39MHz = 302.1us between end of tag response and next reader cmd // 1024/3.39MHz = 302.1us between end of tag response and next reader cmd
#define DELAY_ISO14443B_VICC_TO_VCD_READER 1024 #define DELAY_ISO14443B_VICC_TO_VCD_READER 600 // 1024
#define DELAY_ISO14443B_VCD_TO_VICC_READER 600// 1056
#ifndef RECEIVE_MASK #ifndef RECEIVE_MASK
# define RECEIVE_MASK (DMA_BUFFER_SIZE - 1) # define RECEIVE_MASK (DMA_BUFFER_SIZE - 1)
#endif #endif
#define RECEIVE_SAMPLES_TIMEOUT 330
// Guard Time (per 14443-2) // Guard Time (per 14443-2)
#ifndef TR0 #ifndef TR0
# define TR0 64 // TR0 max is 256/fs = 256/(848kHz) = 302us or 64 samples from FPGA # define TR0 64 // TR0 max is 256/fs = 256/(848kHz) = 302us or 64 samples from FPGA
@ -75,7 +77,7 @@ static void iso14b_set_maxframesize(uint16_t size);
// the block number for the ISO14443-4 PCB (used with APDUs) // the block number for the ISO14443-4 PCB (used with APDUs)
static uint8_t pcb_blocknum = 0; static uint8_t pcb_blocknum = 0;
static uint32_t iso14b_timeout = TR0; static uint32_t iso14b_timeout = FWT_TIMEOUT_14B;
/* ISO 14443 B /* ISO 14443 B
@ -138,6 +140,10 @@ static uint32_t iso14b_timeout = TR0;
* bit rate of 106 kbit/s, or fc/128. Oversample by 4, which ought to make * bit rate of 106 kbit/s, or fc/128. Oversample by 4, which ought to make
* things practical for the ARM (fc/32, 423.8 kbits/s, ~50 kbytes/s) * things practical for the ARM (fc/32, 423.8 kbits/s, ~50 kbytes/s)
* *
* Let us report a correlation every 64 samples. I.e.
* one Q/I pair after 4 subcarrier cycles for the 848kHz subcarrier,
* one Q/I pair after 2 subcarrier cycles for the 424kHz subcarrier,
* one Q/I pair for each subcarrier cyle for the 212kHz subcarrier.
*/ */
@ -280,9 +286,6 @@ static struct {
uint16_t len; uint16_t len;
int sumI; int sumI;
int sumQ; int sumQ;
int sum1;
int sum2;
uint16_t previous_amplitude;
} Demod; } Demod;
// Clear out the state of the "UART" that receives from the tag. // Clear out the state of the "UART" that receives from the tag.
@ -295,7 +298,6 @@ static void Demod14bReset(void) {
Demod.len = 0; Demod.len = 0;
Demod.sumI = 0; Demod.sumI = 0;
Demod.sumQ = 0; Demod.sumQ = 0;
Demod.previous_amplitude = MAX_PREVIOUS_AMPLITUDE;
} }
static void Demod14bInit(uint8_t *data, uint16_t max_len) { static void Demod14bInit(uint8_t *data, uint16_t max_len) {
@ -324,7 +326,7 @@ static void iso14b_set_timeout(uint32_t timeout) {
timeout = MAX_TIMEOUT; timeout = MAX_TIMEOUT;
iso14b_timeout = timeout; iso14b_timeout = timeout;
if (DBGLEVEL >= 3) Dbprintf("ISO14443B Timeout set to %ld fwt", iso14b_timeout); if (DBGLEVEL >= DBG_DEBUG) Dbprintf("ISO14443B Timeout set to %ld fwt", iso14b_timeout);
} }
static void iso14b_set_maxframesize(uint16_t size) { static void iso14b_set_maxframesize(uint16_t size) {
@ -332,7 +334,7 @@ static void iso14b_set_maxframesize(uint16_t size) {
size = MAX_FRAME_SIZE; size = MAX_FRAME_SIZE;
Uart.byteCntMax = size; Uart.byteCntMax = size;
if (DBGLEVEL >= 3) Dbprintf("ISO14443B Max frame size set to %d bytes", Uart.byteCntMax); if (DBGLEVEL >= DBG_DEBUG) Dbprintf("ISO14443B Max frame size set to %d bytes", Uart.byteCntMax);
} }
/* Receive & handle a bit coming from the reader. /* Receive & handle a bit coming from the reader.
@ -350,7 +352,7 @@ static void iso14b_set_maxframesize(uint16_t size) {
static RAMFUNC int Handle14443bSampleFromReader(uint8_t bit) { static RAMFUNC int Handle14443bSampleFromReader(uint8_t bit) {
switch (Uart.state) { switch (Uart.state) {
case STATE_14B_UNSYNCD: case STATE_14B_UNSYNCD:
if (!bit) { if (bit == false) {
// we went low, so this could be the beginning of an SOF // we went low, so this could be the beginning of an SOF
Uart.state = STATE_14B_GOT_FALLING_EDGE_OF_SOF; Uart.state = STATE_14B_GOT_FALLING_EDGE_OF_SOF;
Uart.posCnt = 0; Uart.posCnt = 0;
@ -360,7 +362,9 @@ static RAMFUNC int Handle14443bSampleFromReader(uint8_t bit) {
case STATE_14B_GOT_FALLING_EDGE_OF_SOF: case STATE_14B_GOT_FALLING_EDGE_OF_SOF:
Uart.posCnt++; Uart.posCnt++;
if (Uart.posCnt == 2) { // sample every 4 1/fs in the middle of a bit if (Uart.posCnt == 2) { // sample every 4 1/fs in the middle of a bit
if (bit) { if (bit) {
if (Uart.bitCnt > 9) { if (Uart.bitCnt > 9) {
// we've seen enough consecutive // we've seen enough consecutive
@ -378,7 +382,11 @@ static RAMFUNC int Handle14443bSampleFromReader(uint8_t bit) {
} }
Uart.bitCnt++; Uart.bitCnt++;
} }
if (Uart.posCnt >= 4) Uart.posCnt = 0;
if (Uart.posCnt >= 4) {
Uart.posCnt = 0;
}
if (Uart.bitCnt > 12) { if (Uart.bitCnt > 12) {
// Give up if we see too many zeros without a one, too. // Give up if we see too many zeros without a one, too.
LED_A_OFF(); LED_A_OFF();
@ -388,11 +396,16 @@ static RAMFUNC int Handle14443bSampleFromReader(uint8_t bit) {
case STATE_14B_AWAITING_START_BIT: case STATE_14B_AWAITING_START_BIT:
Uart.posCnt++; Uart.posCnt++;
if (bit) { if (bit) {
if (Uart.posCnt > 50 / 2) { // max 57us between characters = 49 1/fs, max 3 etus after low phase of SOF = 24 1/fs
// max 57us between characters = 49 1/fs,
// max 3 etus after low phase of SOF = 24 1/fs
if (Uart.posCnt > 50 / 2) {
// stayed high for too long between characters, error // stayed high for too long between characters, error
Uart.state = STATE_14B_UNSYNCD; Uart.state = STATE_14B_UNSYNCD;
} }
} else { } else {
// falling edge, this starts the data byte // falling edge, this starts the data byte
Uart.posCnt = 0; Uart.posCnt = 0;
@ -403,7 +416,9 @@ static RAMFUNC int Handle14443bSampleFromReader(uint8_t bit) {
break; break;
case STATE_14B_RECEIVING_DATA: case STATE_14B_RECEIVING_DATA:
Uart.posCnt++; Uart.posCnt++;
if (Uart.posCnt == 2) { if (Uart.posCnt == 2) {
// time to sample a bit // time to sample a bit
Uart.shiftReg >>= 1; Uart.shiftReg >>= 1;
@ -412,14 +427,16 @@ static RAMFUNC int Handle14443bSampleFromReader(uint8_t bit) {
} }
Uart.bitCnt++; Uart.bitCnt++;
} }
if (Uart.posCnt >= 4) { if (Uart.posCnt >= 4) {
Uart.posCnt = 0; Uart.posCnt = 0;
} }
if (Uart.bitCnt == 10) { if (Uart.bitCnt == 10) {
if ((Uart.shiftReg & 0x200) && !(Uart.shiftReg & 0x001)) { if ((Uart.shiftReg & 0x200) && !(Uart.shiftReg & 0x001)) {
// this is a data byte, with correct // this is a data byte, with correct
// start and stop bits // start and stop bits
Uart.output[Uart.byteCnt] = (Uart.shiftReg >> 1) & 0xff; Uart.output[Uart.byteCnt] = (Uart.shiftReg >> 1) & 0xFF;
Uart.byteCnt++; Uart.byteCnt++;
if (Uart.byteCnt >= Uart.byteCntMax) { if (Uart.byteCnt >= Uart.byteCntMax) {
@ -721,31 +738,47 @@ void SimulateIso14443bTag(uint32_t pupi) {
* false if we are still waiting for some more * false if we are still waiting for some more
* *
*/ */
static RAMFUNC int Handle14443bSamplesFromTag(uint16_t amplitude) { static RAMFUNC int Handle14443bSamplesFromTag(int ci, int cq) {
int v;
// The soft decision on the bit uses an estimate of just the
// quadrant of the reference angle, not the exact angle.
#define MAKE_SOFT_DECISION() { \
if(Demod.sumI > 0) { \
v = ci; \
} else { \
v = -ci; \
} \
if(Demod.sumQ > 0) { \
v += cq; \
} else { \
v -= cq; \
} \
}
#define SUBCARRIER_DETECT_THRESHOLD 8
// Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq)))
#define AMPLITUDE(ci,cq) (MAX(ABS(ci),ABS(cq)) + (MIN(ABS(ci),ABS(cq))/2))
switch(Demod.state) { switch(Demod.state) {
case DEMOD_UNSYNCD: { case DEMOD_UNSYNCD: {
// subcarrier detected if (AMPLITUDE(ci, cq) > SUBCARRIER_DETECT_THRESHOLD) { // subcarrier detected
if (amplitude > NOISE_THRESHOLD + Demod.previous_amplitude) {
Demod.state = DEMOD_PHASE_REF_TRAINING; Demod.state = DEMOD_PHASE_REF_TRAINING;
//Demod.sumI = ci; Demod.sumI = ci;
//Demod.sumQ = cq; Demod.sumQ = cq;
Demod.posCount = 1; Demod.posCount = 1;
} else {
Demod.posCount++;
Demod.previous_amplitude = amplitude;
} }
break; break;
} }
case DEMOD_PHASE_REF_TRAINING: { case DEMOD_PHASE_REF_TRAINING: {
if (Demod.posCount < 8) { if (Demod.posCount < 8) {
if (amplitude > NOISE_THRESHOLD + Demod.previous_amplitude) { if (AMPLITUDE(ci, cq) > SUBCARRIER_DETECT_THRESHOLD) {
// set the reference phase (will code a logic '1') by averaging over 32 1/fs. // set the reference phase (will code a logic '1') by averaging over 32 1/fs.
// note: synchronization time > 80 1/fs // note: synchronization time > 80 1/fs
//Demod.sumI += ci; Demod.sumI += ci;
//Demod.sumQ += cq; Demod.sumQ += cq;
Demod.posCount++; Demod.posCount++;
} else { } else {
// subcarrier lost // subcarrier lost
@ -756,53 +789,48 @@ static RAMFUNC int Handle14443bSamplesFromTag(uint16_t amplitude) {
} }
break; break;
} }
case DEMOD_AWAITING_FALLING_EDGE_OF_SOF: { case DEMOD_AWAITING_FALLING_EDGE_OF_SOF: {
// logic '0' detected MAKE_SOFT_DECISION();
if (amplitude == 0) {
if (v < 0) { // logic '0' detected
Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF; Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF;
// start of SOF sequence Demod.posCount = 0; // start of SOF sequence
Demod.posCount = 0;
} else { } else {
// maximum length of TR1 = 200 1/fs if (Demod.posCount > 200 / 4) { // maximum length of TR1 = 200 1/fs
if (Demod.posCount > 200 / 4) {
Demod.state = DEMOD_UNSYNCD; Demod.state = DEMOD_UNSYNCD;
} }
} }
Demod.posCount++; Demod.posCount++;
break; break;
} }
case DEMOD_GOT_FALLING_EDGE_OF_SOF: { case DEMOD_GOT_FALLING_EDGE_OF_SOF: {
Demod.posCount++;
if (amplitude > 0) { Demod.posCount++;
// low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges MAKE_SOFT_DECISION();
if (Demod.posCount < 9 * 2) {
if (v > 0) {
if (Demod.posCount < 9 * 2) { // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges
Demod.state = DEMOD_UNSYNCD; Demod.state = DEMOD_UNSYNCD;
} else { } else {
LED_C_ON(); // Got SOF LED_C_ON(); // Got SOF
Demod.state = DEMOD_AWAITING_START_BIT;
Demod.posCount = 0; Demod.posCount = 0;
Demod.bitCount = 0; Demod.bitCount = 0;
Demod.len = 0; Demod.len = 0;
Demod.state = DEMOD_AWAITING_START_BIT;
} }
} else { } else {
// low phase of SOF too long (> 12 etu) if (Demod.posCount > 14 * 2) { // low phase of SOF too long (> 12 etu)
if (Demod.posCount > 14 * 2) {
Demod.state = DEMOD_UNSYNCD; Demod.state = DEMOD_UNSYNCD;
Demod.previous_amplitude = amplitude;
LED_C_OFF(); LED_C_OFF();
} }
} }
break; break;
} }
case DEMOD_AWAITING_START_BIT: { case DEMOD_AWAITING_START_BIT: {
Demod.posCount++; Demod.posCount++;
MAKE_SOFT_DECISION();
if (amplitude > 0) { if (v > 0) {
if (Demod.posCount > 6 * 2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs if (Demod.posCount > 6 * 2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs
LED_C_OFF(); LED_C_OFF();
if (Demod.bitCount == 0 && Demod.len == 0) { // received SOF only, this is valid for iClass/Picopass if (Demod.bitCount == 0 && Demod.len == 0) { // received SOF only, this is valid for iClass/Picopass
@ -812,51 +840,43 @@ static RAMFUNC int Handle14443bSamplesFromTag(uint16_t amplitude) {
} }
} }
} else { // start bit detected } else { // start bit detected
Demod.bitCount = 0;
Demod.posCount = 1; // this was the first half Demod.posCount = 1; // this was the first half
Demod.thisBit = amplitude; Demod.thisBit = v;
Demod.shiftReg = 0; Demod.shiftReg = 0;
Demod.state = DEMOD_RECEIVING_DATA; Demod.state = DEMOD_RECEIVING_DATA;
} }
break; break;
} }
case DEMOD_RECEIVING_DATA: { case DEMOD_RECEIVING_DATA: {
if (Demod.posCount == 0) { MAKE_SOFT_DECISION();
// first half of bit
Demod.thisBit = amplitude;
Demod.posCount = 1;
} else {
// second half of bit
Demod.thisBit += amplitude;
Demod.shiftReg >>= 1;
// OR in a logic '1' if (Demod.posCount == 0) { // first half of bit
if (Demod.thisBit > 0) Demod.thisBit = v;
Demod.posCount = 1;
} else { // second half of bit
Demod.thisBit += v;
Demod.shiftReg >>= 1;
if (Demod.thisBit > 0) { // logic '1'
Demod.shiftReg |= 0x200; Demod.shiftReg |= 0x200;
}
Demod.bitCount++; Demod.bitCount++;
// 1 start 8 data 1 stop = 10
if (Demod.bitCount == 10) { if (Demod.bitCount == 10) {
uint16_t s = Demod.shiftReg; uint16_t s = Demod.shiftReg;
// stop bit == '1', start bit == '0' if ((s & 0x200) && !(s & 0x001)) { // stop bit == '1', start bit == '0'
if ((s & 0x200) && ((s & 0x001) == 0)) {
// left shift to drop the startbit
Demod.output[Demod.len] = (s >> 1); Demod.output[Demod.len] = (s >> 1);
Demod.len++; Demod.len++;
Demod.bitCount = 0; Demod.bitCount = 0;
Demod.state = DEMOD_AWAITING_START_BIT; Demod.state = DEMOD_AWAITING_START_BIT;
} else { } else {
// this one is a bit hard, either its a correc byte or its unsynced.
Demod.state = DEMOD_UNSYNCD; Demod.state = DEMOD_UNSYNCD;
LED_C_OFF(); LED_C_OFF();
if (s == 0x000) {
// This is EOF (start, stop and all data bits == '0' // This is EOF (start, stop and all data bits == '0'
if (s == 0) {
return true; return true;
} }
} }
@ -865,7 +885,6 @@ static RAMFUNC int Handle14443bSamplesFromTag(uint16_t amplitude) {
} }
break; break;
} }
default: { default: {
Demod.state = DEMOD_UNSYNCD; Demod.state = DEMOD_UNSYNCD;
LED_C_OFF(); LED_C_OFF();
@ -879,20 +898,18 @@ static RAMFUNC int Handle14443bSamplesFromTag(uint16_t amplitude) {
/* /*
* Demodulate the samples we received from the tag, also log to tracebuffer * Demodulate the samples we received from the tag, also log to tracebuffer
*/ */
static int Get14443bAnswerFromTag(int timeout, uint32_t *eof_time) { static int Get14443bAnswerFromTag(uint8_t *response, uint16_t max_len, int timeout, uint32_t *eof_time) {
int samples = 0, ret = 0; int samples = 0, ret = 0;
// Set up the demodulator for tag -> reader responses. // Set up the demodulator for tag -> reader responses.
uint8_t dm_buf[MAX_FRAME_SIZE]; Demod14bInit(response, max_len);
Demod14bInit(dm_buf, sizeof(dm_buf));
//Demod14bInit(BigBuf_malloc(MAX_FRAME_SIZE), MAX_FRAME_SIZE);
// wait for last transfer to complete // wait for last transfer to complete
while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY)) {}; while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY)) {};
// And put the FPGA in the appropriate mode // And put the FPGA in the appropriate mode
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_848_KHZ | FPGA_HF_READER_MODE_RECEIVE_AMPLITUDE); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_848_KHZ | FPGA_HF_READER_MODE_RECEIVE_IQ);
// Setup and start DMA. // Setup and start DMA.
FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER); FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
@ -914,12 +931,15 @@ static int Get14443bAnswerFromTag(int timeout, uint32_t *eof_time) {
continue; continue;
samples++; samples++;
if (samples == 1) { if (samples == 1) {
// DMA has transferred the very first data // DMA has transferred the very first data
dma_start_time = GetCountSspClk() & 0xfffffff0; dma_start_time = GetCountSspClk() & 0xfffffff0;
} }
volatile uint16_t tagdata = *upTo++; volatile int8_t ci = *upTo >> 8;
volatile int8_t cq = *upTo;
upTo++;
// we have read all of the DMA buffer content. // we have read all of the DMA buffer content.
if (upTo >= dma->buf + DMA_BUFFER_SIZE) { if (upTo >= dma->buf + DMA_BUFFER_SIZE) {
@ -943,40 +963,39 @@ static int Get14443bAnswerFromTag(int timeout, uint32_t *eof_time) {
WDT_HIT(); WDT_HIT();
if (BUTTON_PRESS()) { if (BUTTON_PRESS()) {
DbpString("Sniff stopped"); DbpString("stopped");
break; break;
} }
} }
} }
// if (Handle14443bSamplesFromTag( (tagdata >> 8) & 0xFF, tagdata & 0xFF )) { if (Handle14443bSamplesFromTag(ci, cq)) {
if (Handle14443bSamplesFromTag(tagdata)) {
*eof_time = dma_start_time + (samples * 16); // - DELAY_TAG_TO_ARM; // end of EOF *eof_time = dma_start_time + (samples * 16) - DELAY_TAG_TO_ARM; // end of EOF
if (Demod.len > Demod.max_len) { if (Demod.len > Demod.max_len) {
ret = -2; // buffer overflow ret = -2; // overflow
} }
break; break;
} }
if (samples > timeout && Demod.state < DEMOD_PHASE_REF_TRAINING) { if (samples > timeout && Demod.state < DEMOD_PHASE_REF_TRAINING) {
ret = -1; // timeout ret = -1;
break; break;
} }
} }
FpgaDisableSscDma(); FpgaDisableSscDma();
uint32_t sof_time = *eof_time
- (Demod.len * 8 * 8 * 16) // time for byte transfers
- (32 * 16) // time for SOF transfer
- 0; // time for EOF transfer
if (ret < 0) { if (ret < 0) {
return ret; return ret;
} }
if (Demod.len > 0) { if (Demod.len > 0) {
uint32_t sof_time = *eof_time
- (Demod.len * 8 * 8 * 16) // time for byte transfers
- (32 * 16) // time for SOF transfer
- 0; // time for EOF transfer
LogTrace(Demod.output, Demod.len, (sof_time * 4), (*eof_time * 4), NULL, false); LogTrace(Demod.output, Demod.len, (sof_time * 4), (*eof_time * 4), NULL, false);
} }
@ -1120,7 +1139,8 @@ static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len, uint32_t
/* Sends an APDU to the tag /* Sends an APDU to the tag
* TODO: check CRC and preamble * TODO: check CRC and preamble
*/ */
uint8_t iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *response) { uint8_t iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *response, uint16_t respmaxlen) {
LED_A_ON(); LED_A_ON();
uint8_t message_frame[message_length + 4]; uint8_t message_frame[message_length + 4];
// PCB // PCB
@ -1136,30 +1156,28 @@ uint8_t iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *r
// send // send
uint32_t start_time = 0; uint32_t start_time = 0;
CodeAndTransmit14443bAsReader(message_frame, message_length + 4, &start_time); CodeAndTransmit14443bAsReader(message_frame, message_length + 4, &start_time);
// get response // get response
uint32_t eof_time = 0; if (response) {
int ret = Get14443bAnswerFromTag(RECEIVE_SAMPLES_TIMEOUT, &eof_time); uint32_t eof_time = start_time + DELAY_ISO14443B_VCD_TO_VICC_READER;
int retlen = Get14443bAnswerFromTag(response, respmaxlen, ISO14443B_READER_TIMEOUT, &eof_time);
start_time = eof_time + DELAY_ISO14443B_VICC_TO_VCD_READER;
FpgaDisableTracing(); FpgaDisableTracing();
if (ret < 3) { if (retlen < 3) {
LED_A_OFF(); LED_A_OFF();
return 0; return 0;
} }
// VALIDATE CRC // VALIDATE CRC
if (!check_crc(CRC_14443_B, Demod.output, Demod.len)) { if (!check_crc(CRC_14443_B, response, retlen)) {
if (DBGLEVEL > 3) DbpString("CRC fail"); if (DBGLEVEL > DBG_DEBUG) DbpString("CRC fail");
return 0; return 0;
} }
// copy response contents
if (response != NULL)
memcpy(response, Demod.output, Demod.len);
return Demod.len; return retlen;
} else {
return 0;
}
LED_A_OFF(); LED_A_OFF();
} }
@ -1169,63 +1187,78 @@ uint8_t iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *r
static uint8_t iso14443b_select_srx_card(iso14b_card_select_t *card) { static uint8_t iso14443b_select_srx_card(iso14b_card_select_t *card) {
// INITIATE command: wake up the tag using the INITIATE // INITIATE command: wake up the tag using the INITIATE
static const uint8_t init_srx[] = { ISO14443B_INITIATE, 0x00, 0x97, 0x5b }; static const uint8_t init_srx[] = { ISO14443B_INITIATE, 0x00, 0x97, 0x5b };
// SELECT command (with space for CRC) uint8_t r_init[3] = {0x0};
uint8_t select_srx[] = { ISO14443B_SELECT, 0x00, 0x00, 0x00}; uint8_t r_select[3] = {0x0};
uint8_t r_papid[10] = {0x0};
uint32_t start_time = 0; uint32_t start_time = 0;
CodeAndTransmit14443bAsReader(init_srx, sizeof(init_srx), &start_time); CodeAndTransmit14443bAsReader(init_srx, sizeof(init_srx), &start_time);
uint32_t eof_time = start_time + 0;
int ret = Get14443bAnswerFromTag(RECEIVE_SAMPLES_TIMEOUT, &eof_time); uint32_t eof_time = start_time + DELAY_ISO14443B_VCD_TO_VICC_READER;
int retlen = Get14443bAnswerFromTag(r_init, sizeof(r_init), ISO14443B_READER_TIMEOUT, &eof_time);
FpgaDisableTracing(); FpgaDisableTracing();
if (Demod.len == 0 || ret < 0) if (retlen <= 0)
return 2; return 2;
Dbprintf("Randomly generated Chip ID (+ 2 byte CRC): %02x [%02x %02x]", Demod.output[0], Demod.output[1], Demod.output[2]); // Dbprintf("Randomly generated Chip ID (+ 2 byte CRC): %02x [%02x %02x]", r_init[0], r_init[1], r_init[2]);
// Randomly generated Chip ID // Randomly generated Chip ID
if (card) card->chipid = Demod.output[0]; if (card) {
card->chipid = Demod.output[0];
}
select_srx[1] = Demod.output[0]; // SELECT command (with space for CRC)
uint8_t select_srx[] = { ISO14443B_SELECT, 0x00, 0x00, 0x00};
select_srx[1] = r_init[0];
AddCrc14B(select_srx, 2); AddCrc14B(select_srx, 2);
start_time = eof_time + DELAY_ISO14443B_VICC_TO_VCD_READER;
CodeAndTransmit14443bAsReader(select_srx, sizeof(select_srx), &start_time); CodeAndTransmit14443bAsReader(select_srx, sizeof(select_srx), &start_time);
eof_time += 0;
ret = Get14443bAnswerFromTag(RECEIVE_SAMPLES_TIMEOUT, &eof_time); eof_time = start_time + DELAY_ISO14443B_VCD_TO_VICC_READER;
retlen = Get14443bAnswerFromTag(r_select, sizeof(r_select), ISO14443B_READER_TIMEOUT, &eof_time);
FpgaDisableTracing(); FpgaDisableTracing();
if (Demod.len != 3 || ret < 0) if (retlen != 3) {
return 2; return 2;
}
// Check the CRC of the answer: // Check the CRC of the answer:
if (!check_crc(CRC_14443_B, Demod.output, Demod.len)) if (!check_crc(CRC_14443_B, r_select, retlen)) {
return 3; return 3;
}
// Check response from the tag: should be the same UID as the command we just sent: // Check response from the tag: should be the same UID as the command we just sent:
if (select_srx[1] != Demod.output[0]) if (select_srx[1] != r_select[0]) {
return 1; return 1;
}
// First get the tag's UID: // First get the tag's UID:
select_srx[0] = ISO14443B_GET_UID; select_srx[0] = ISO14443B_GET_UID;
AddCrc14B(select_srx, 1); AddCrc14B(select_srx, 1);
start_time = eof_time + DELAY_ISO14443B_VICC_TO_VCD_READER;
CodeAndTransmit14443bAsReader(select_srx, 3, &start_time); // Only first three bytes for this one CodeAndTransmit14443bAsReader(select_srx, 3, &start_time); // Only first three bytes for this one
eof_time += 0; eof_time = start_time + DELAY_ISO14443B_VCD_TO_VICC_READER;
ret = Get14443bAnswerFromTag(RECEIVE_SAMPLES_TIMEOUT, &eof_time); retlen = Get14443bAnswerFromTag(r_papid, sizeof(r_papid), ISO14443B_READER_TIMEOUT, &eof_time);
FpgaDisableTracing(); FpgaDisableTracing();
if (Demod.len != 10 || ret < 0) if (retlen != 10) {
return 2; return 2;
}
// The check the CRC of the answer // The check the CRC of the answer
if (!check_crc(CRC_14443_B, Demod.output, Demod.len)) if (!check_crc(CRC_14443_B, r_papid, retlen)) {
return 3; return 3;
}
if (card) { if (card) {
card->uidlen = 8; card->uidlen = 8;
memcpy(card->uid, Demod.output, 8); memcpy(card->uid, r_papid, 8);
} }
return 0; return 0;
@ -1243,52 +1276,60 @@ int iso14443b_select_card(iso14b_card_select_t *card) {
// ATTRIB command (with space for CRC) // ATTRIB command (with space for CRC)
uint8_t attrib[] = { ISO14443B_ATTRIB, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00}; uint8_t attrib[] = { ISO14443B_ATTRIB, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00};
uint8_t r_pupid[14] = {0x0};
uint8_t r_attrib[3] = {0x0};
// first, wake up the tag // first, wake up the tag
uint32_t start_time = 0; uint32_t start_time = 0;
CodeAndTransmit14443bAsReader(wupb, sizeof(wupb), &start_time); CodeAndTransmit14443bAsReader(wupb, sizeof(wupb), &start_time);
uint32_t eof_time = start_time + 0;
int ret = Get14443bAnswerFromTag(RECEIVE_SAMPLES_TIMEOUT, &eof_time); uint32_t eof_time = start_time + DELAY_ISO14443B_VCD_TO_VICC_READER;;
int retlen = Get14443bAnswerFromTag(r_pupid, sizeof(r_pupid), ISO14443B_READER_TIMEOUT, &eof_time);
FpgaDisableTracing(); FpgaDisableTracing();
// ATQB too short? // ATQB too short?
if (ret < 14) if (retlen < 14) {
return -1; return -1;
}
// VALIDATE CRC // VALIDATE CRC
if (!check_crc(CRC_14443_B, Demod.output, Demod.len)) if (!check_crc(CRC_14443_B, r_pupid, retlen)) {
return -2; return -2;
}
if (card) { if (card) {
card->uidlen = 4; card->uidlen = 4;
memcpy(card->uid, Demod.output + 1, 4); memcpy(card->uid, r_pupid + 1, 4);
memcpy(card->atqb, Demod.output + 5, 7); memcpy(card->atqb, r_pupid + 5, 7);
} }
// copy the PUPI to ATTRIB ( PUPI == UID ) // copy the PUPI to ATTRIB ( PUPI == UID )
memcpy(attrib + 1, Demod.output + 1, 4); memcpy(attrib + 1, r_pupid + 1, 4);
// copy the protocol info from ATQB (Protocol Info -> Protocol_Type) into ATTRIB (Param 3) // copy the protocol info from ATQB (Protocol Info -> Protocol_Type) into ATTRIB (Param 3)
attrib[7] = Demod.output[10] & 0x0F; attrib[7] = r_pupid[10] & 0x0F;
AddCrc14B(attrib, 9); AddCrc14B(attrib, 9);
start_time = eof_time + DELAY_ISO14443B_VICC_TO_VCD_READER;
CodeAndTransmit14443bAsReader(attrib, sizeof(attrib), &start_time); CodeAndTransmit14443bAsReader(attrib, sizeof(attrib), &start_time);
eof_time = start_time + 0; eof_time = start_time + DELAY_ISO14443B_VCD_TO_VICC_READER;
ret = Get14443bAnswerFromTag(RECEIVE_SAMPLES_TIMEOUT, &eof_time); retlen = Get14443bAnswerFromTag(r_attrib, sizeof(r_attrib), ISO14443B_READER_TIMEOUT, &eof_time);
FpgaDisableTracing(); FpgaDisableTracing();
// Answer to ATTRIB too short? // Answer to ATTRIB too short?
if (ret < 3) if (retlen < 3) {
return -1; return -1;
}
// VALIDATE CRC // VALIDATE CRC
if (!check_crc(CRC_14443_B, Demod.output, Demod.len)) if (!check_crc(CRC_14443_B, r_attrib, retlen)) {
return -2; return -2;
}
if (card) { if (card) {
// CID // CID
card->cid = Demod.output[0]; card->cid = r_attrib[0];
// MAX FRAME // MAX FRAME
uint16_t maxFrame = card->atqb[5] >> 4; uint16_t maxFrame = card->atqb[5] >> 4;
@ -1318,6 +1359,10 @@ void iso14443b_setup(void) {
LEDsoff(); LEDsoff();
FpgaDownloadAndGo(FPGA_BITSTREAM_HF); FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
// allocate command receive buffer
BigBuf_free();
BigBuf_Clear_ext(false);
// Initialize Demod and Uart structs // Initialize Demod and Uart structs
Demod14bInit(BigBuf_malloc(MAX_FRAME_SIZE), MAX_FRAME_SIZE); Demod14bInit(BigBuf_malloc(MAX_FRAME_SIZE), MAX_FRAME_SIZE);
Uart14bInit(BigBuf_malloc(MAX_FRAME_SIZE)); Uart14bInit(BigBuf_malloc(MAX_FRAME_SIZE));
@ -1347,40 +1392,48 @@ void iso14443b_setup(void) {
// //
// I tried to be systematic and check every answer of the tag, every CRC, etc... // I tried to be systematic and check every answer of the tag, every CRC, etc...
//----------------------------------------------------------------------------- //-----------------------------------------------------------------------------
static bool ReadSTBlock(uint8_t block) { static bool ReadSTBlock(uint8_t blocknr, uint8_t *block) {
uint8_t cmd[] = {ISO14443B_READ_BLK, block, 0x00, 0x00}; uint8_t cmd[] = {ISO14443B_READ_BLK, blocknr, 0x00, 0x00};
AddCrc14B(cmd, 2); AddCrc14B(cmd, 2);
uint8_t r_block[6] = {0};
uint32_t start_time = 0; uint32_t start_time = 0;
CodeAndTransmit14443bAsReader(cmd, sizeof(cmd), &start_time); CodeAndTransmit14443bAsReader(cmd, sizeof(cmd), &start_time);
uint32_t eof_time = start_time + 0;
int res = Get14443bAnswerFromTag(RECEIVE_SAMPLES_TIMEOUT, &eof_time); uint32_t eof_time = start_time + DELAY_ISO14443B_VCD_TO_VICC_READER;
int retlen = Get14443bAnswerFromTag(r_block, sizeof(r_block), ISO14443B_READER_TIMEOUT, &eof_time);
FpgaDisableTracing(); FpgaDisableTracing();
// Check if we got an answer from the tag // Check if we got an answer from the tag
if (Demod.len != 6 || res < 0) { if (retlen != 6) {
DbpString("[!] expected 6 bytes from tag, got less..."); DbpString("[!] expected 6 bytes from tag, got less...");
return false; return false;
} }
// The check the CRC of the answer // The check the CRC of the answer
if (!check_crc(CRC_14443_B, Demod.output, Demod.len)) { if (!check_crc(CRC_14443_B, r_block, retlen)) {
DbpString("CRC fail"); DbpString("CRC fail");
return false; return false;
} }
if (block) {
memcpy(block, r_block, 4);
}
Dbprintf("Address=%02x, Contents=%08x, CRC=%04x",
blocknr,
(r_block[3] << 24) + (r_block[2] << 16) + (r_block[1] << 8) + r_block[0],
(r_block[4] << 8) + r_block[5]);
return true; return true;
} }
void ReadSTMemoryIso14443b(uint8_t numofblocks) { void ReadSTMemoryIso14443b(uint8_t numofblocks) {
// Make sure that we start from off, since the tags are stateful;
// confusing things will happen if we don't reset them between reads.
//switch_off();
uint8_t i = 0x00;
uint8_t *buf = BigBuf_malloc(sizeof(iso14b_card_select_t));
iso14443b_setup(); iso14443b_setup();
iso14b_card_select_t *card = (iso14b_card_select_t *)buf; iso14b_card_select_t card;
uint8_t res = iso14443b_select_srx_card(card); uint8_t res = iso14443b_select_srx_card(&card);
// 0: OK 2: attrib fail, 3:crc fail, // 0: OK 2: attrib fail, 3:crc fail,
if (res > 0) goto out; if (res > 0) goto out;
@ -1389,28 +1442,20 @@ void ReadSTMemoryIso14443b(uint8_t numofblocks) {
++numofblocks; ++numofblocks;
for (;;) { uint8_t data[4] = {0};
for (uint8_t i = 0; i != 0xFF; i++) {
if (i == numofblocks) { if (i == numofblocks) {
DbpString("System area block (0xFF):"); DbpString("System area block (0xFF):");
i = 0xff; i = 0xff;
} }
uint8_t retries = 3; if (ReadSTBlock(i, data ) == false)
do { break;
res = ReadSTBlock(i);
} while (!res && --retries);
if (!res && !retries) { if (i == 0xFF)
goto out; break;
}
// Now print out the memory location:
Dbprintf("Address=%02x, Contents=%08x, CRC=%04x", i,
(Demod.output[3] << 24) + (Demod.output[2] << 16) + (Demod.output[1] << 8) + Demod.output[0],
(Demod.output[4] << 8) + Demod.output[5]);
if (i == 0xff) break;
++i;
} }
// Todo: iceman: send back read data to client. // Todo: iceman: send back read data to client.
@ -1462,8 +1507,8 @@ void SniffIso14443b(void) {
//Uart14bInit(BigBuf_malloc(MAX_FRAME_SIZE)); //Uart14bInit(BigBuf_malloc(MAX_FRAME_SIZE));
// Set FPGA in the appropriate mode // Set FPGA in the appropriate mode
//FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_848_KHZ | FPGA_HF_READER_MODE_SNIFF_IQ); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_848_KHZ | FPGA_HF_READER_MODE_SNIFF_IQ);
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_848_KHZ | FPGA_HF_READER_MODE_SNIFF_AMPLITUDE); // FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_848_KHZ | FPGA_HF_READER_MODE_SNIFF_AMPLITUDE);
// connect Demodulated Signal to ADC: // connect Demodulated Signal to ADC:
SetAdcMuxFor(GPIO_MUXSEL_HIPKD); SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
@ -1505,7 +1550,9 @@ void SniffIso14443b(void) {
dma_start_time = GetCountSspClk() & 0xfffffff0; dma_start_time = GetCountSspClk() & 0xfffffff0;
} }
volatile uint16_t sniffdata = *upTo++; volatile int8_t ci = *upTo >> 8;
volatile int8_t cq = *upTo;
upTo++;
// we have read all of the DMA buffer content. // we have read all of the DMA buffer content.
if (upTo >= dma->buf + DMA_BUFFER_SIZE) { if (upTo >= dma->buf + DMA_BUFFER_SIZE) {
@ -1538,10 +1585,7 @@ void SniffIso14443b(void) {
// no need to try decoding reader data if the tag is sending // no need to try decoding reader data if the tag is sending
if (tag_is_active == false) { if (tag_is_active == false) {
if (Handle14443bSampleFromReader((sniffdata & 0x2) >> 1)) { if (Handle14443bSampleFromReader(ci & 0x01)) {
//if (Handle14443bSampleFromReader((sniffdata & 0x0100) >> 8)) {
//if (Handle14443bSampleFromReader(ci & 0x01)) {
uint32_t eof_time = dma_start_time + (samples * 16) + 8; // - DELAY_READER_TO_ARM_SNIFF; // end of EOF uint32_t eof_time = dma_start_time + (samples * 16) + 8; // - DELAY_READER_TO_ARM_SNIFF; // end of EOF
if (Uart.byteCnt > 0) { if (Uart.byteCnt > 0) {
uint32_t sof_time = eof_time uint32_t sof_time = eof_time
@ -1557,8 +1601,7 @@ void SniffIso14443b(void) {
expect_tag_answer = true; expect_tag_answer = true;
} }
if (Handle14443bSampleFromReader(sniffdata & 0x01)) { if (Handle14443bSampleFromReader(cq & 0x01)) {
//if (Handle14443bSampleFromReader(cq & 0x01)) {
uint32_t eof_time = dma_start_time + (samples * 16) + 16; // - DELAY_READER_TO_ARM_SNIFF; // end of EOF uint32_t eof_time = dma_start_time + (samples * 16) + 16; // - DELAY_READER_TO_ARM_SNIFF; // end of EOF
if (Uart.byteCnt > 0) { if (Uart.byteCnt > 0) {
@ -1581,8 +1624,7 @@ void SniffIso14443b(void) {
// no need to try decoding tag data if the reader is sending - and we cannot afford the time // no need to try decoding tag data if the reader is sending - and we cannot afford the time
if (reader_is_active == false && expect_tag_answer) { if (reader_is_active == false && expect_tag_answer) {
if (Handle14443bSamplesFromTag( sniffdata >> 2 )) { if (Handle14443bSamplesFromTag((ci >> 1), (cq >> 1)) >= 0) {
// if (Handle14443bSamplesFromTag(((sniffdata >> 8) & 0xFF), sniffdata & 0xFF)) {
uint32_t eof_time = dma_start_time + (samples * 16); // - DELAY_TAG_TO_ARM_SNIFF; // end of EOF uint32_t eof_time = dma_start_time + (samples * 16); // - DELAY_TAG_TO_ARM_SNIFF; // end of EOF
uint32_t sof_time = eof_time uint32_t sof_time = eof_time
@ -1639,12 +1681,8 @@ void SendRawCommand14443B_Ex(PacketCommandNG *c) {
size_t len = c->oldarg[1] & 0xffff; size_t len = c->oldarg[1] & 0xffff;
uint32_t timeout = c->oldarg[2]; uint32_t timeout = c->oldarg[2];
uint8_t *cmd = c->data.asBytes; uint8_t *cmd = c->data.asBytes;
int status;
uint32_t sendlen = sizeof(iso14b_card_select_t);
uint8_t buf[PM3_CMD_DATA_SIZE] = {0x00}; if (DBGLEVEL > DBG_DEBUG) Dbprintf("14b raw: param, %04x", param);
if (DBGLEVEL > 3) Dbprintf("14b raw: param, %04x", param);
// turn on trigger (LED_A) // turn on trigger (LED_A)
if ((param & ISO14B_REQUEST_TRIGGER) == ISO14B_REQUEST_TRIGGER) if ((param & ISO14B_REQUEST_TRIGGER) == ISO14B_REQUEST_TRIGGER)
@ -1660,24 +1698,27 @@ void SendRawCommand14443B_Ex(PacketCommandNG *c) {
set_tracing(true); set_tracing(true);
int status;
uint32_t sendlen = sizeof(iso14b_card_select_t);
iso14b_card_select_t card;
if ((param & ISO14B_SELECT_STD) == ISO14B_SELECT_STD) { if ((param & ISO14B_SELECT_STD) == ISO14B_SELECT_STD) {
iso14b_card_select_t *card = (iso14b_card_select_t *)buf; status = iso14443b_select_card(&card);
status = iso14443b_select_card(card); reply_mix(CMD_HF_ISO14443B_COMMAND, status, sendlen, 0, (uint8_t*)&card, sendlen);
reply_mix(CMD_HF_ISO14443B_COMMAND, status, sendlen, 0, buf, sendlen);
// 0: OK -1: attrib fail, -2:crc fail, // 0: OK -1: attrib fail, -2:crc fail,
if (status != 0) goto out; if (status != 0) goto out;
} }
if ((param & ISO14B_SELECT_SR) == ISO14B_SELECT_SR) { if ((param & ISO14B_SELECT_SR) == ISO14B_SELECT_SR) {
iso14b_card_select_t *card = (iso14b_card_select_t *)buf; status = iso14443b_select_srx_card(&card);
status = iso14443b_select_srx_card(card); reply_mix(CMD_HF_ISO14443B_COMMAND, status, sendlen, 0, (uint8_t*)&card, sendlen);
reply_mix(CMD_HF_ISO14443B_COMMAND, status, sendlen, 0, buf, sendlen);
// 0: OK 2: demod fail, 3:crc fail, // 0: OK 2: demod fail, 3:crc fail,
if (status > 0) goto out; if (status > 0) goto out;
} }
if ((param & ISO14B_APDU) == ISO14B_APDU) { if ((param & ISO14B_APDU) == ISO14B_APDU) {
status = iso14443b_apdu(cmd, len, buf); uint8_t buf[100] = {0};
status = iso14443b_apdu(cmd, len, buf, sizeof(buf));
reply_mix(CMD_HF_ISO14443B_COMMAND, status, status, 0, buf, status); reply_mix(CMD_HF_ISO14443B_COMMAND, status, status, 0, buf, status);
} }
@ -1686,15 +1727,17 @@ void SendRawCommand14443B_Ex(PacketCommandNG *c) {
AddCrc14B(cmd, len); AddCrc14B(cmd, len);
len += 2; len += 2;
} }
uint8_t buf[100] = {0};
uint32_t start_time = 0; uint32_t start_time = 0;
CodeAndTransmit14443bAsReader(cmd, len, &start_time); // raw CodeAndTransmit14443bAsReader(cmd, len, &start_time); // raw
uint32_t eof_time = start_time + 0;
status = Get14443bAnswerFromTag(RECEIVE_SAMPLES_TIMEOUT, &eof_time); // raw uint32_t eof_time = start_time + DELAY_ISO14443B_VCD_TO_VICC_READER;
status = Get14443bAnswerFromTag(buf, sizeof(buf), 5 * ISO14443B_READER_TIMEOUT, &eof_time); // raw
FpgaDisableTracing(); FpgaDisableTracing();
sendlen = MIN(Demod.len, PM3_CMD_DATA_SIZE); sendlen = MIN(Demod.len, PM3_CMD_DATA_SIZE);
reply_old(CMD_HF_ISO14443B_COMMAND, status, sendlen, 0, Demod.output, sendlen); reply_mix(CMD_HF_ISO14443B_COMMAND, status, sendlen, 0, Demod.output, sendlen);
} }
out: out:

3
armsrc/iso14443b.h
View file

@ -27,7 +27,8 @@
#endif #endif
void iso14443b_setup(void); void iso14443b_setup(void);
uint8_t iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *response); uint8_t iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *response, uint16_t respmaxlen);
int iso14443b_select_card(iso14b_card_select_t *card); int iso14443b_select_card(iso14b_card_select_t *card);
uint8_t iso14443b_select_card_srx(iso14b_card_select_t *card); uint8_t iso14443b_select_card_srx(iso14b_card_select_t *card);