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resolve inline warnings
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4 changed files with 32 additions and 0 deletions
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@ -92,7 +92,12 @@ static inline uint8_t rx_byte_from_fpga() {
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//
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//
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// Note: The SSC receiver is never synchronized the calculation may be performed
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// Note: The SSC receiver is never synchronized the calculation may be performed
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// on a i/q pair from two subsequent correlations, but does not matter.
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// on a i/q pair from two subsequent correlations, but does not matter.
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// Note: inlining this function would fail with -Os
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#ifdef __OPTIMIZE_SIZE__
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static int32_t sample_power() {
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#else
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static inline int32_t sample_power() {
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static inline int32_t sample_power() {
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#endif
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int32_t q = (int8_t)rx_byte_from_fpga();
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int32_t q = (int8_t)rx_byte_from_fpga();
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q = ABS(q);
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q = ABS(q);
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int32_t i = (int8_t)rx_byte_from_fpga();
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int32_t i = (int8_t)rx_byte_from_fpga();
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@ -65,7 +65,12 @@ static uint32_t last_frame_end; /* ts of last bit of previews rx or tx frame */
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// Returns true if a pulse/pause is received within timeout
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// Returns true if a pulse/pause is received within timeout
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// Note: inlining this function would fail with -Os
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#ifdef __OPTIMIZE_SIZE__
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static bool wait_for(bool value, const uint32_t timeout) {
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#else
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static inline bool wait_for(bool value, const uint32_t timeout) {
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static inline bool wait_for(bool value, const uint32_t timeout) {
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#endif
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while ((bool)(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN) != value) {
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while ((bool)(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN) != value) {
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if (GetCountSspClk() > timeout) {
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if (GetCountSspClk() > timeout) {
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return false;
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return false;
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@ -126,7 +131,12 @@ static inline int8_t rx_bit() {
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// Note: The Subcarrier is not disabled during bits to prevent glitches. This is
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// Note: The Subcarrier is not disabled during bits to prevent glitches. This is
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// not mandatory but results in a cleaner signal. tx_frame will disable
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// not mandatory but results in a cleaner signal. tx_frame will disable
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// the subcarrier when the frame is done.
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// the subcarrier when the frame is done.
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// Note: inlining this function would fail with -Os
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#ifdef __OPTIMIZE_SIZE__
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static void tx_bit(bool bit) {
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#else
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static inline void tx_bit(bool bit) {
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static inline void tx_bit(bool bit) {
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#endif
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LED_C_ON();
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LED_C_ON();
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if (bit) {
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if (bit) {
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@ -66,6 +66,9 @@ bool validate_prng_nonce(uint32_t nonce);
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#define LF_POLY_EVEN (0x870804)
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#define LF_POLY_EVEN (0x870804)
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#define BIT(x, n) ((x) >> (n) & 1)
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#define BIT(x, n) ((x) >> (n) & 1)
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#define BEBIT(x, n) BIT(x, (n) ^ 24)
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#define BEBIT(x, n) BIT(x, (n) ^ 24)
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#ifdef __OPTIMIZE_SIZE__
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int filter(uint32_t const x);
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#else
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static inline int filter(uint32_t const x) {
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static inline int filter(uint32_t const x) {
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uint32_t f;
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uint32_t f;
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@ -77,3 +80,4 @@ static inline int filter(uint32_t const x) {
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return BIT(0xEC57E80A, f);
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return BIT(0xEC57E80A, f);
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}
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}
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#endif
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#endif
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#endif
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@ -21,6 +21,19 @@
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#include "crapto1.h"
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#include "crapto1.h"
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#include "parity.h"
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#include "parity.h"
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#ifdef __OPTIMIZE_SIZE__
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int filter(uint32_t const x) {
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uint32_t f;
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f = 0xf22c0 >> (x & 0xf) & 16;
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f |= 0x6c9c0 >> (x >> 4 & 0xf) & 8;
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f |= 0x3c8b0 >> (x >> 8 & 0xf) & 4;
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f |= 0x1e458 >> (x >> 12 & 0xf) & 2;
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f |= 0x0d938 >> (x >> 16 & 0xf) & 1;
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return BIT(0xEC57E80A, f);
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}
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#endif
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#define SWAPENDIAN(x)\
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#define SWAPENDIAN(x)\
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(x = (x >> 8 & 0xff00ff) | (x & 0xff00ff) << 8, x = x >> 16 | x << 16)
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(x = (x >> 8 & 0xff00ff) | (x & 0xff00ff) << 8, x = x >> 16 | x << 16)
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