mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-21 05:43:48 -07:00
chg: 'hf felica litedump' - more stable impl. Will not break when run twice in a row. Still device can be in a loop if 100sec timeout occures. :(
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parent
6e93ed80a3
commit
82dbfba827
2 changed files with 58 additions and 51 deletions
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@ -203,7 +203,7 @@ void HfSnoopISO18(uint32_t samplesToSkip, uint32_t triggersToSkip) {
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// connect Demodulated Signal to ADC:
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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BigBuf_free(); BigBuf_Clear();
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BigBuf_free(); BigBuf_Clear_ext(false);
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clear_trace();
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FpgaWriteConfWord(FPGA_MAJOR_MODE_ISO18092|FPGA_HF_ISO18092_FLAG_NOMOD);
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@ -262,14 +262,14 @@ void HfSnoopISO18(uint32_t samplesToSkip, uint32_t triggersToSkip) {
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}
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}
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switch_off();
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//reset framing
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AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(8) | AT91C_SSC_MSBF | SSC_FRAME_MODE_WORDS_PER_TRANSFER(0);
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set_tracelen(numbts);
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LED_D_OFF();
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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Dbprintf("Felica sniffing done, tracelen: %i, use hf list felica for annotations", BigBuf_get_traceLen());
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cmd_send(CMD_ACK,1,0,0,0,0);
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cmd_send(CMD_ACK,1, numbts,0,0,0);
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}
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// poll-0: 0xb2,0x4d,0x06,0x00,0xff,0xff,0x00,0x00,0x09,0x21,
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@ -515,7 +515,7 @@ void HfSimLite( uint64_t nfcid) {
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if( BUTTON_PRESS()) break;
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}
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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switch_off();
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DbpString("Felica Lite-S sim end");
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}
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@ -562,7 +562,7 @@ void HfDumpFelicaLiteS() {
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FpgaSetupSsc();
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// allocate command receive buffer
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BigBuf_free(); BigBuf_Clear();
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BigBuf_free(); BigBuf_Clear_ext(false);
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LED_D_ON();
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@ -595,7 +595,7 @@ void HfDumpFelicaLiteS() {
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WDT_HIT();
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TransmitFor18092_AsReader(poll, 10, GetCountSspClk()+8,1,0);
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TransmitFor18092_AsReader(poll, 10, GetCountSspClk()+8, 1, 0);
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if (WaitForFelicaReply(512) && NFCFrame.framebytes[3] == FELICA_POLL_ACK) {
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@ -629,15 +629,15 @@ void HfDumpFelicaLiteS() {
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}
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}
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break;
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}
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//SpinDelay(500);
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}
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}
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switch_off();
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//Resetting Frame mode (First set in fpgaloader.c)
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AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(8) | AT91C_SSC_MSBF | SSC_FRAME_MODE_WORDS_PER_TRANSFER(0);
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//setting tracelen - important! it was set by buffer overflow before
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//setting tracelen - important! it was set by buffer overflow before
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set_tracelen(cnt);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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cmd_send(CMD_ACK,1,0,0,0,0);
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}
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cmd_send(CMD_ACK, 1, cnt, 0, 0, 0);
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}
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