mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-14 10:37:23 -07:00
Merge remote-tracking branch 'upstream/master'
This commit is contained in:
marshmellow42
commit
7e72f90a7f
4 changed files with 111 additions and 79 deletions
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@ -135,12 +135,25 @@ static int ReadAdc(int ch)
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AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
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AT91C_BASE_ADC->ADC_MR =
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ADC_MODE_PRESCALE(32) |
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ADC_MODE_STARTUP_TIME(16) |
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ADC_MODE_SAMPLE_HOLD_TIME(8);
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ADC_MODE_PRESCALE(63 /* was 32 */) | // ADC_CLK = MCK / ((63+1) * 2) = 48MHz / 128 = 375kHz
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ADC_MODE_STARTUP_TIME(1 /* was 16 */) | // Startup Time = (1+1) * 8 / ADC_CLK = 16 / 375kHz = 42,7us Note: must be > 20us
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ADC_MODE_SAMPLE_HOLD_TIME(15 /* was 8 */); // Sample & Hold Time SHTIM = 15 / ADC_CLK = 15 / 375kHz = 40us
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// Note: ADC_MODE_PRESCALE and ADC_MODE_SAMPLE_HOLD_TIME are set to the maximum allowed value.
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// Both AMPL_LO and AMPL_HI are very high impedance (10MOhm) outputs, the input capacitance of the ADC is 12pF (typical). This results in a time constant
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// of RC = 10MOhm * 12pF = 120us. Even after the maximum configurable sample&hold time of 40us the input capacitor will not be fully charged.
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//
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// The maths are:
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// If there is a voltage v_in at the input, the voltage v_cap at the capacitor (this is what we are measuring) will be
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//
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// v_cap = v_in * (1 - exp(-RC/SHTIM)) = v_in * (1 - exp(-3)) = v_in * 0,95 (i.e. an error of 5%)
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//
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// Note: with the "historic" values in the comments above, the error was 34% !!!
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AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ch);
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AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
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while(!(AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ch)))
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;
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d = AT91C_BASE_ADC->ADC_CDR[ch];
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@ -183,9 +196,7 @@ void MeasureAntennaTuning(void)
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WDT_HIT();
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, i);
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SpinDelay(20);
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// Vref = 3.3V, and a 10000:240 voltage divider on the input
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// can measure voltages up to 137500 mV
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adcval = ((137500 * AvgAdc(ADC_CHAN_LF)) >> 10);
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adcval = ((MAX_ADC_LF_VOLTAGE * AvgAdc(ADC_CHAN_LF)) >> 10);
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if (i==95) vLf125 = adcval; // voltage at 125Khz
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if (i==89) vLf134 = adcval; // voltage at 134Khz
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@ -205,11 +216,9 @@ void MeasureAntennaTuning(void)
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
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SpinDelay(20);
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// Vref = 3300mV, and an 10:1 voltage divider on the input
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// can measure voltages up to 33000 mV
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vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
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vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
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cmd_send(CMD_MEASURED_ANTENNA_TUNING,vLf125|(vLf134<<16),vHf,peakf|(peakv<<16),LF_Results,256);
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cmd_send(CMD_MEASURED_ANTENNA_TUNING, vLf125 | (vLf134<<16), vHf, peakf | (peakv<<16), LF_Results, 256);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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LED_A_OFF();
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LED_B_OFF();
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@ -222,19 +231,21 @@ void MeasureAntennaTuningHf(void)
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DbpString("Measuring HF antenna, press button to exit");
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// Let the FPGA drive the high-frequency antenna around 13.56 MHz.
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
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for (;;) {
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// Let the FPGA drive the high-frequency antenna around 13.56 MHz.
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
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SpinDelay(20);
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// Vref = 3300mV, and an 10:1 voltage divider on the input
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// can measure voltages up to 33000 mV
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vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
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vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
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Dbprintf("%d mV",vHf);
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if (BUTTON_PRESS()) break;
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}
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DbpString("cancelled");
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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}
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@ -512,26 +523,32 @@ static const int LIGHT_LEN = sizeof(LIGHT_SCHEME)/sizeof(LIGHT_SCHEME[0]);
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void ListenReaderField(int limit)
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{
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int lf_av, lf_av_new, lf_baseline= 0, lf_count= 0, lf_max;
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int hf_av, hf_av_new, hf_baseline= 0, hf_count= 0, hf_max;
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int lf_av, lf_av_new, lf_baseline= 0, lf_max;
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int hf_av, hf_av_new, hf_baseline= 0, hf_max;
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int mode=1, display_val, display_max, i;
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#define LF_ONLY 1
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#define HF_ONLY 2
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#define LF_ONLY 1
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#define HF_ONLY 2
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#define REPORT_CHANGE 10 // report new values only if they have changed at least by REPORT_CHANGE
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// switch off FPGA - we don't want to measure our own signal
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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LEDsoff();
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lf_av=lf_max=ReadAdc(ADC_CHAN_LF);
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lf_av = lf_max = AvgAdc(ADC_CHAN_LF);
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if(limit != HF_ONLY) {
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Dbprintf("LF 125/134 Baseline: %d", lf_av);
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Dbprintf("LF 125/134kHz Baseline: %dmV", (MAX_ADC_LF_VOLTAGE * lf_av) >> 10);
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lf_baseline = lf_av;
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}
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hf_av=hf_max=ReadAdc(ADC_CHAN_HF);
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hf_av = hf_max = AvgAdc(ADC_CHAN_HF);
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if (limit != LF_ONLY) {
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Dbprintf("HF 13.56 Baseline: %d", hf_av);
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Dbprintf("HF 13.56MHz Baseline: %dmV", (MAX_ADC_HF_VOLTAGE * hf_av) >> 10);
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hf_baseline = hf_av;
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}
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@ -554,38 +571,38 @@ void ListenReaderField(int limit)
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WDT_HIT();
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if (limit != HF_ONLY) {
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if(mode==1) {
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if (abs(lf_av - lf_baseline) > 10) LED_D_ON();
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else LED_D_OFF();
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if(mode == 1) {
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if (abs(lf_av - lf_baseline) > REPORT_CHANGE)
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LED_D_ON();
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else
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LED_D_OFF();
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}
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++lf_count;
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lf_av_new= ReadAdc(ADC_CHAN_LF);
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lf_av_new = AvgAdc(ADC_CHAN_LF);
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// see if there's a significant change
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if(abs(lf_av - lf_av_new) > 10) {
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Dbprintf("LF 125/134 Field Change: %x %x %x", lf_av, lf_av_new, lf_count);
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if(abs(lf_av - lf_av_new) > REPORT_CHANGE) {
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Dbprintf("LF 125/134kHz Field Change: %5dmV", (MAX_ADC_LF_VOLTAGE * lf_av_new) >> 10);
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lf_av = lf_av_new;
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if (lf_av > lf_max)
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lf_max = lf_av;
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lf_count= 0;
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}
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}
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if (limit != LF_ONLY) {
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if (mode == 1){
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if (abs(hf_av - hf_baseline) > 10) LED_B_ON();
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else LED_B_OFF();
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if (abs(hf_av - hf_baseline) > REPORT_CHANGE)
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LED_B_ON();
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else
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LED_B_OFF();
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}
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++hf_count;
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hf_av_new= ReadAdc(ADC_CHAN_HF);
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hf_av_new = AvgAdc(ADC_CHAN_HF);
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// see if there's a significant change
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if(abs(hf_av - hf_av_new) > 10) {
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Dbprintf("HF 13.56 Field Change: %x %x %x", hf_av, hf_av_new, hf_count);
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if(abs(hf_av - hf_av_new) > REPORT_CHANGE) {
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Dbprintf("HF 13.56MHz Field Change: %5dmV", (MAX_ADC_HF_VOLTAGE * hf_av_new) >> 10);
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hf_av = hf_av_new;
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if (hf_av > hf_max)
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hf_max = hf_av;
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hf_count= 0;
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}
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}
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@ -38,6 +38,10 @@ void DbpString(char *str);
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void Dbprintf(const char *fmt, ...);
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void Dbhexdump(int len, uint8_t *d, bool bAsci);
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// ADC Vref = 3300mV, and an (10M+1M):1M voltage divider on the HF input can measure voltages up to 36300 mV
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#define MAX_ADC_HF_VOLTAGE 36300
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// ADC Vref = 3300mV, and an (10000k+240k):240k voltage divider on the LF input can measure voltages up to 140800 mV
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#define MAX_ADC_LF_VOLTAGE 140800
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int AvgAdc(int ch);
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void ToSendStuffBit(int b);
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@ -310,26 +310,27 @@ static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time)
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Uart.twoBits = (Uart.twoBits << 8) | bit;
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if (Uart.state == STATE_UNSYNCD) { // not yet synced
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if (Uart.state == STATE_UNSYNCD) { // not yet synced
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if (Uart.highCnt < 7) { // wait for a stable unmodulated signal
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if (Uart.highCnt < 2) { // wait for a stable unmodulated signal
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if (Uart.twoBits == 0xffff) {
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Uart.highCnt++;
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} else {
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Uart.highCnt = 0;
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}
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} else {
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Uart.syncBit = 0xFFFF; // not set
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// look for 00xx1111 (the start bit)
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if ((Uart.twoBits & 0x6780) == 0x0780) Uart.syncBit = 7;
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else if ((Uart.twoBits & 0x33C0) == 0x03C0) Uart.syncBit = 6;
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else if ((Uart.twoBits & 0x19E0) == 0x01E0) Uart.syncBit = 5;
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else if ((Uart.twoBits & 0x0CF0) == 0x00F0) Uart.syncBit = 4;
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else if ((Uart.twoBits & 0x0678) == 0x0078) Uart.syncBit = 3;
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else if ((Uart.twoBits & 0x033C) == 0x003C) Uart.syncBit = 2;
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else if ((Uart.twoBits & 0x019E) == 0x001E) Uart.syncBit = 1;
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else if ((Uart.twoBits & 0x00CF) == 0x000F) Uart.syncBit = 0;
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if (Uart.syncBit != 0xFFFF) {
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Uart.syncBit = 0xFFFF; // not set
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// we look for a ...1111111100x11111xxxxxx pattern (the start bit)
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if ((Uart.twoBits & 0xDF00) == 0x1F00) Uart.syncBit = 8; // mask is 11x11111 xxxxxxxx,
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// check for 00x11111 xxxxxxxx
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else if ((Uart.twoBits & 0xEF80) == 0x8F80) Uart.syncBit = 7; // both masks shifted right one bit, left padded with '1'
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else if ((Uart.twoBits & 0xF7C0) == 0xC7C0) Uart.syncBit = 6; // ...
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else if ((Uart.twoBits & 0xFBE0) == 0xE3E0) Uart.syncBit = 5;
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else if ((Uart.twoBits & 0xFDF0) == 0xF1F0) Uart.syncBit = 4;
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else if ((Uart.twoBits & 0xFEF8) == 0xF8F8) Uart.syncBit = 3;
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else if ((Uart.twoBits & 0xFF7C) == 0xFC7C) Uart.syncBit = 2;
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else if ((Uart.twoBits & 0xFFBE) == 0xFE3E) Uart.syncBit = 1;
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if (Uart.syncBit != 0xFFFF) { // found a sync bit
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Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
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Uart.startTime -= Uart.syncBit;
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Uart.endTime = Uart.startTime;
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@ -342,11 +343,9 @@ static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time)
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if (IsMillerModulationNibble1(Uart.twoBits >> Uart.syncBit)) {
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if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation in both halves - error
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UartReset();
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Uart.highCnt = 6;
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} else { // Modulation in first half = Sequence Z = logic "0"
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if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
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UartReset();
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Uart.highCnt = 6;
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} else {
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Uart.bitCount++;
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Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
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@ -401,12 +400,13 @@ static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time)
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if (Uart.len) {
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return TRUE; // we are finished with decoding the raw data sequence
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} else {
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UartReset(); // Nothing receiver - start over
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UartReset(); // Nothing received - start over
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Uart.highCnt = 1;
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}
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}
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if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
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UartReset();
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Uart.highCnt = 6;
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Uart.highCnt = 1;
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} else { // a logic "0"
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Uart.bitCount++;
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Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
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@ -1425,6 +1425,7 @@ void CodeIso14443aAsReaderPar(const uint8_t *cmd, uint16_t len, const uint8_t *p
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CodeIso14443aBitsAsReaderPar(cmd, len*8, parity);
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}
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//-----------------------------------------------------------------------------
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// Wait for commands from reader
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// Stop when button is pressed (return 1) or field was gone (return 2)
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@ -1447,9 +1448,9 @@ static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity)
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// Set ADC to read field strength
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AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
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AT91C_BASE_ADC->ADC_MR =
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ADC_MODE_PRESCALE(32) |
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ADC_MODE_STARTUP_TIME(16) |
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ADC_MODE_SAMPLE_HOLD_TIME(8);
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ADC_MODE_PRESCALE(63) |
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ADC_MODE_STARTUP_TIME(1) |
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ADC_MODE_SAMPLE_HOLD_TIME(15);
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AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
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// start ADC
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AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
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@ -1459,7 +1460,7 @@ static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity)
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// Clear RXRDY:
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uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
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for(;;) {
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WDT_HIT();
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@ -1471,7 +1472,7 @@ static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity)
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analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
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AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
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if (analogCnt >= 32) {
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if ((33000 * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
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if ((MAX_ADC_HF_VOLTAGE * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
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vtime = GetTickCount();
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if (!timer) timer = vtime;
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// 50ms no field --> card to idle state
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@ -1546,14 +1547,15 @@ static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNe
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}
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// Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
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for (i = 0; i < 2 ; ) {
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uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3;
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for (i = 0; i <= fpga_queued_bits/8 + 1; ) {
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if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
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AT91C_BASE_SSC->SSC_THR = SEC_F;
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FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
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i++;
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}
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}
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LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
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return 0;
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@ -1655,7 +1657,7 @@ static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receive
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// clear RXRDY:
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uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
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c = 0;
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for(;;) {
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WDT_HIT();
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@ -2264,6 +2266,7 @@ void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *
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// free eventually allocated BigBuf memory but keep Emulator Memory
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BigBuf_free_keep_EM();
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// clear trace
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iso14a_clear_trace();
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iso14a_set_tracing(TRUE);
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@ -2328,10 +2331,8 @@ void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *
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WDT_HIT();
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// find reader field
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// Vref = 3300mV, and an 10:1 voltage divider on the input
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// can measure voltages up to 33000 mV
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if (cardSTATE == MFEMUL_NOFIELD) {
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vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
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vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
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if (vHf > MF_MINFIELDV) {
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cardSTATE_TO_IDLE();
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LED_A_ON();
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@ -2406,6 +2407,7 @@ void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *
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LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
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break;
|
||||
}
|
||||
|
||||
uint32_t ar = bytes_to_num(receivedCmd, 4);
|
||||
uint32_t nr = bytes_to_num(&receivedCmd[4], 4);
|
||||
|
||||
|
|
@ -2512,6 +2514,7 @@ void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *
|
|||
ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
|
||||
num_to_bytes(ans, 4, rAUTH_AT);
|
||||
}
|
||||
|
||||
EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
|
||||
//Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
|
||||
cardSTATE = MFEMUL_AUTH1;
|
||||
|
|
@ -2692,7 +2695,7 @@ void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *
|
|||
if(ar_nr_collected > 1) {
|
||||
Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
|
||||
Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x",
|
||||
ar_nr_responses[0], // UID
|
||||
ar_nr_responses[0], // UID
|
||||
ar_nr_responses[1], //NT
|
||||
ar_nr_responses[2], //AR1
|
||||
ar_nr_responses[3], //NR1
|
||||
|
|
@ -2712,6 +2715,7 @@ void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *
|
|||
}
|
||||
}
|
||||
if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, traceLen);
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -1914,24 +1914,31 @@ int CmdTuneSamples(const char *Cmd)
|
|||
PrintAndLog("# LF antenna: %5.2f V @ 134.00 kHz", vLf134/1000.0);
|
||||
PrintAndLog("# LF optimal: %5.2f V @%9.2f kHz", peakv/1000.0, 12000.0/(peakf+1));
|
||||
PrintAndLog("# HF antenna: %5.2f V @ 13.56 MHz", vHf/1000.0);
|
||||
if (peakv<2000)
|
||||
|
||||
#define LF_UNUSABLE_V 2948 // was 2000. Changed due to bugfix in voltage measurements. LF results are now 47% higher.
|
||||
#define LF_MARGINAL_V 14739 // was 10000. Changed due to bugfix bug in voltage measurements. LF results are now 47% higher.
|
||||
#define HF_UNUSABLE_V 3167 // was 2000. Changed due to bugfix in voltage measurements. HF results are now 58% higher.
|
||||
#define HF_MARGINAL_V 7917 // was 5000. Changed due to bugfix in voltage measurements. HF results are now 58% higher.
|
||||
|
||||
if (peakv < LF_UNUSABLE_V)
|
||||
PrintAndLog("# Your LF antenna is unusable.");
|
||||
else if (peakv<10000)
|
||||
else if (peakv < LF_MARGINAL_V)
|
||||
PrintAndLog("# Your LF antenna is marginal.");
|
||||
if (vHf<2000)
|
||||
if (vHf < HF_UNUSABLE_V)
|
||||
PrintAndLog("# Your HF antenna is unusable.");
|
||||
else if (vHf<5000)
|
||||
else if (vHf < HF_MARGINAL_V)
|
||||
PrintAndLog("# Your HF antenna is marginal.");
|
||||
|
||||
for (int i = 0; i < 256; i++) {
|
||||
GraphBuffer[i] = resp.d.asBytes[i] - 128;
|
||||
if (peakv >= LF_UNUSABLE_V) {
|
||||
for (int i = 0; i < 256; i++) {
|
||||
GraphBuffer[i] = resp.d.asBytes[i] - 128;
|
||||
}
|
||||
PrintAndLog("Displaying LF tuning graph. Divisor 89 is 134khz, 95 is 125khz.\n");
|
||||
PrintAndLog("\n");
|
||||
GraphTraceLen = 256;
|
||||
ShowGraphWindow();
|
||||
}
|
||||
|
||||
PrintAndLog("Done! Divisor 89 is 134khz, 95 is 125khz.\n");
|
||||
PrintAndLog("\n");
|
||||
GraphTraceLen = 256;
|
||||
ShowGraphWindow();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue