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adaptations to lf hitag..
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2 changed files with 43 additions and 8 deletions
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@ -52,9 +52,12 @@ bool lf_test_periods(size_t expected, size_t count) {
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//////////////////////////////////////////////////////////////////////////////
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// Low frequency (LF) adc passthrough functionality
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//////////////////////////////////////////////////////////////////////////////
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static uint8_t previous_adc_val = 0;
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static uint8_t previous_adc_val = 0; //0xFF;
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static uint8_t adc_avg = 0;
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uint8_t get_adc_avg(void) {
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return adc_avg;
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}
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void lf_sample_mean(void) {
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uint8_t periods = 0;
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uint32_t adc_sum = 0;
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@ -66,20 +69,44 @@ void lf_sample_mean(void) {
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}
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// division by 32
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adc_avg = adc_sum >> 5;
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previous_adc_val = adc_avg;
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if (DBGLEVEL >= DBG_EXTENDED)
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Dbprintf("LF ADC average %u", adc_avg);
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}
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static size_t lf_count_edge_periods_ex(size_t max, bool wait, bool detect_gap) {
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#define LIMIT_DEV 20
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// timeout limit to 100 000 w/o
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uint32_t timeout = 100000;
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size_t periods = 0;
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uint8_t avg_peak = adc_avg + 3, avg_through = adc_avg - 3;
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uint8_t avg_peak = adc_avg + LIMIT_DEV;
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uint8_t avg_through = adc_avg - LIMIT_DEV;
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while (BUTTON_PRESS() == false) {
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WDT_HIT();
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timeout--;
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if (timeout == 0) {
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return 0;
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}
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
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AT91C_BASE_SSC->SSC_THR = 0x00;
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continue;
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}
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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volatile uint8_t adc_val = AT91C_BASE_SSC->SSC_RHR;
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periods++;
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// reset timeout
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timeout = 100000;
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volatile uint8_t adc_val = AT91C_BASE_SSC->SSC_RHR;
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if (g_logging) logSampleSimple(adc_val);
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// Only test field changes if state of adc values matter
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@ -94,21 +121,28 @@ static size_t lf_count_edge_periods_ex(size_t max, bool wait, bool detect_gap) {
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} else {
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// Trigger on a modulation swap by observing an edge change
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if (rising_edge) {
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if ((previous_adc_val > avg_peak) && (adc_val <= previous_adc_val)) {
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rising_edge = false;
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return periods;
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}
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} else {
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if ((previous_adc_val < avg_through) && (adc_val >= previous_adc_val)) {
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rising_edge = true;
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return periods;
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}
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}
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}
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}
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}
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previous_adc_val = adc_val;
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if (periods >= max) return 0;
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if (periods >= max) {
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return 0;
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}
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}
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}
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@ -169,10 +203,10 @@ void lf_init(bool reader, bool simulate) {
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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} else {
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if (simulate)
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// FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC);
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else
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// Sniff
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//FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_TOGGLE_MODE);
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}
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@ -185,10 +219,10 @@ void lf_init(bool reader, bool simulate) {
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// When in reader mode, give the field a bit of time to settle.
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// 313T0 = 313 * 8us = 2504us = 2.5ms Hitag2 tags needs to be fully powered.
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if (reader) {
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// if (reader) {
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// 10 ms
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SpinDelay(10);
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}
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// }
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// Steal this pin from the SSP (SPI communication channel with fpga) and use it to control the modulation
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AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
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@ -17,6 +17,7 @@
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extern bool g_logging;
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uint8_t get_adc_avg(void);
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void lf_sample_mean(void);
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bool lf_test_periods(size_t expected, size_t count);
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size_t lf_count_edge_periods(size_t max);
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