mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-14 18:48:13 -07:00
Pushed standard AT91 defines into main code
This commit is contained in:
d18c7db
parent
5d32e2bf60
commit
6949aca9fa
16 changed files with 1368 additions and 1521 deletions
140
armsrc/lfops.c
140
armsrc/lfops.c
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@ -42,12 +42,12 @@ void DoAcquisition125k(BOOL at134khz)
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memset(dest,0,n);
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i = 0;
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for(;;) {
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if(SSC_STATUS & (SSC_STATUS_TX_READY)) {
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SSC_TRANSMIT_HOLDING = 0x43;
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if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
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AT91C_BASE_SSC->SSC_THR = 0x43;
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LED_D_ON();
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}
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if(SSC_STATUS & (SSC_STATUS_RX_READY)) {
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dest[i] = (BYTE)SSC_RECEIVE_HOLDING;
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if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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dest[i] = (BYTE)AT91C_BASE_SSC->SSC_RHR;
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i++;
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LED_D_OFF();
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if(i >= n) {
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@ -274,17 +274,17 @@ void WriteTIbyte(BYTE b)
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{
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if (b&(1<<i)) {
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// stop modulating antenna
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PIO_OUTPUT_DATA_CLEAR = (1<<GPIO_SSC_DOUT);
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LOW(GPIO_SSC_DOUT);
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SpinDelayUs(1000);
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// modulate antenna
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PIO_OUTPUT_DATA_SET = (1<<GPIO_SSC_DOUT);
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HIGH(GPIO_SSC_DOUT);
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SpinDelayUs(1000);
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} else {
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// stop modulating antenna
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PIO_OUTPUT_DATA_CLEAR = (1<<GPIO_SSC_DOUT);
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LOW(GPIO_SSC_DOUT);
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SpinDelayUs(300);
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// modulate antenna
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PIO_OUTPUT_DATA_SET = (1<<GPIO_SSC_DOUT);
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HIGH(GPIO_SSC_DOUT);
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SpinDelayUs(1700);
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}
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}
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@ -301,50 +301,50 @@ void AcquireTiType(void)
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memset(BigBuf,0,sizeof(BigBuf));
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// Set up the synchronous serial port
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PIO_DISABLE = (1<<GPIO_SSC_DIN);
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PIO_PERIPHERAL_A_SEL = (1<<GPIO_SSC_DIN);
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AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DIN;
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AT91C_BASE_PIOA->PIO_ASR = GPIO_SSC_DIN;
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// steal this pin from the SSP and use it to control the modulation
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PIO_ENABLE = (1<<GPIO_SSC_DOUT);
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PIO_OUTPUT_ENABLE = (1<<GPIO_SSC_DOUT);
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AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
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AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
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SSC_CONTROL = SSC_CONTROL_RESET;
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SSC_CONTROL = SSC_CONTROL_RX_ENABLE | SSC_CONTROL_TX_ENABLE;
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AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST;
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AT91C_BASE_SSC->SSC_CR = AT91C_SSC_RXEN | AT91C_SSC_TXEN;
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// Sample at 2 Mbit/s, so TI tags are 16.2 vs. 14.9 clocks long
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// 48/2 = 24 MHz clock must be divided by 12
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SSC_CLOCK_DIVISOR = 12;
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// Sample at 2 Mbit/s, so TI tags are 16.2 vs. 14.9 clocks long
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// 48/2 = 24 MHz clock must be divided by 12
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AT91C_BASE_SSC->SSC_CMR = 12;
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SSC_RECEIVE_CLOCK_MODE = SSC_CLOCK_MODE_SELECT(0);
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SSC_RECEIVE_FRAME_MODE = SSC_FRAME_MODE_BITS_IN_WORD(32) | SSC_FRAME_MODE_MSB_FIRST;
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SSC_TRANSMIT_CLOCK_MODE = 0;
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SSC_TRANSMIT_FRAME_MODE = 0;
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AT91C_BASE_SSC->SSC_RCMR = SSC_CLOCK_MODE_SELECT(0);
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AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(32) | AT91C_SSC_MSBF;
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AT91C_BASE_SSC->SSC_TCMR = 0;
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AT91C_BASE_SSC->SSC_TFMR = 0;
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LED_D_ON();
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// modulate antenna
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PIO_OUTPUT_DATA_SET = (1<<GPIO_SSC_DOUT);
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HIGH(GPIO_SSC_DOUT);
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// Charge TI tag for 50ms.
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SpinDelay(50);
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// stop modulating antenna and listen
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PIO_OUTPUT_DATA_CLEAR = (1<<GPIO_SSC_DOUT);
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LOW(GPIO_SSC_DOUT);
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LED_D_OFF();
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i = 0;
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for(;;) {
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if(SSC_STATUS & SSC_STATUS_RX_READY) {
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BigBuf[i] = SSC_RECEIVE_HOLDING; // store 32 bit values in buffer
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i++; if(i >= TIBUFLEN) break;
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}
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WDT_HIT();
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if(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
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BigBuf[i] = AT91C_BASE_SSC->SSC_RHR; // store 32 bit values in buffer
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i++; if(i >= TIBUFLEN) break;
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}
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WDT_HIT();
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}
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// return stolen pin to SSP
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PIO_DISABLE = (1<<GPIO_SSC_DOUT);
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PIO_PERIPHERAL_A_SEL = (1<<GPIO_SSC_DIN) | (1<<GPIO_SSC_DOUT);
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AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DOUT;
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AT91C_BASE_PIOA->PIO_ASR = GPIO_SSC_DIN | GPIO_SSC_DOUT;
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char *dest = (char *)BigBuf;
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n = TIBUFLEN*32;
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@ -394,8 +394,8 @@ void WriteTItag(DWORD idhi, DWORD idlo, WORD crc)
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LED_A_ON();
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// steal this pin from the SSP and use it to control the modulation
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PIO_ENABLE = (1<<GPIO_SSC_DOUT);
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PIO_OUTPUT_ENABLE = (1<<GPIO_SSC_DOUT);
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AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
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AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
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// writing algorithm:
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// a high bit consists of a field off for 1ms and field on for 1ms
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@ -408,7 +408,7 @@ void WriteTItag(DWORD idhi, DWORD idlo, WORD crc)
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// finish with 15ms programming time
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// modulate antenna
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PIO_OUTPUT_DATA_SET = (1<<GPIO_SSC_DOUT);
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HIGH(GPIO_SSC_DOUT);
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SpinDelay(50); // charge time
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WriteTIbyte(0xbb); // keyword
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@ -425,7 +425,7 @@ void WriteTItag(DWORD idhi, DWORD idlo, WORD crc)
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WriteTIbyte( (crc>>8 )&0xff ); // crc hi
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WriteTIbyte(0x00); // write frame lo
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WriteTIbyte(0x03); // write frame hi
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PIO_OUTPUT_DATA_SET = (1<<GPIO_SSC_DOUT);
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HIGH(GPIO_SSC_DOUT);
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SpinDelay(50); // programming time
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LED_A_OFF();
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@ -444,17 +444,17 @@ void SimulateTagLowFrequency(int period, int ledcontrol)
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_SIMULATOR);
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PIO_ENABLE = (1 << GPIO_SSC_DOUT) | (1 << GPIO_SSC_CLK);
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AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK;
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PIO_OUTPUT_ENABLE = (1 << GPIO_SSC_DOUT);
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PIO_OUTPUT_DISABLE = (1 << GPIO_SSC_CLK);
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AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
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AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_CLK;
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#define SHORT_COIL() LOW(GPIO_SSC_DOUT)
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#define OPEN_COIL() HIGH(GPIO_SSC_DOUT)
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#define OPEN_COIL() HIGH(GPIO_SSC_DOUT)
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i = 0;
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for(;;) {
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while(!(PIO_PIN_DATA_STATUS & (1<<GPIO_SSC_CLK))) {
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while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) {
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if(BUTTON_PRESS()) {
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DbpString("Stopped");
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return;
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@ -473,7 +473,7 @@ void SimulateTagLowFrequency(int period, int ledcontrol)
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if (ledcontrol)
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LED_D_OFF();
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while(PIO_PIN_DATA_STATUS & (1<<GPIO_SSC_CLK)) {
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while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK) {
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if(BUTTON_PRESS()) {
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DbpString("Stopped");
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return;
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@ -529,7 +529,7 @@ void SimulateTagLowFrequencyBidir(int divisor, int t0)
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hitag2_init();
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/* Set up simulator mode, frequency divisor which will drive the FPGA
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* and analog mux selection.
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* and analog mux selection.
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*/
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_SIMULATOR);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor);
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@ -539,15 +539,19 @@ void SimulateTagLowFrequencyBidir(int divisor, int t0)
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/* Set up Timer 1:
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* Capture mode, timer source MCK/2 (TIMER_CLOCK1), TIOA is external trigger,
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* external trigger rising edge, load RA on rising edge of TIOA, load RB on rising
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* edge of TIOA. Assign PA15 to TIOA1 (peripheral B)
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* edge of TIOA. Assign PA15 to TIOA1 (peripheral B)
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*/
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PMC_PERIPHERAL_CLK_ENABLE = (1 << PERIPH_TC1);
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PIO_PERIPHERAL_B_SEL = (1 << GPIO_SSC_FRAME);
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TC1_CCR = TC_CCR_CLKDIS;
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TC1_CMR = TC_CMR_TCCLKS_TIMER_CLOCK1 | TC_CMR_ETRGEDG_RISING | TC_CMR_ABETRG |
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TC_CMR_LDRA_RISING | TC_CMR_LDRB_RISING;
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TC1_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG;
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AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC1);
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AT91C_BASE_PIOA->PIO_BSR = GPIO_SSC_FRAME;
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS;
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AT91C_BASE_TC1->TC_CMR = TC_CMR_TCCLKS_TIMER_CLOCK1 |
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AT91C_TC_ETRGEDG_RISING |
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AT91C_TC_ABETRG |
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AT91C_TC_LDRA_RISING |
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AT91C_TC_LDRB_RISING;
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN |
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AT91C_TC_SWTRG;
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/* calculate the new value for the carrier period in terms of TC1 values */
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t0 = t0/2;
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@ -555,8 +559,8 @@ void SimulateTagLowFrequencyBidir(int divisor, int t0)
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int overflow = 0;
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while(!BUTTON_PRESS()) {
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WDT_HIT();
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if(TC1_SR & TC_SR_LDRAS) {
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int ra = TC1_RA;
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if(AT91C_BASE_TC1->TC_SR & AT91C_TC_LDRAS) {
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int ra = AT91C_BASE_TC1->TC_RA;
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if((ra > t0*HITAG_T_EOF) | overflow) ra = t0*HITAG_T_EOF+1;
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#if DEBUG_RA_VALUES
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if(ra > 255 || overflow) ra = 255;
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@ -583,14 +587,14 @@ void SimulateTagLowFrequencyBidir(int divisor, int t0)
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overflow = 0;
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LED_D_ON();
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} else {
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if(TC1_CV > t0*HITAG_T_EOF) {
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if(AT91C_BASE_TC1->TC_CV > t0*HITAG_T_EOF) {
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/* Minor nuisance: In Capture mode, the timer can not be
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* stopped by a Compare C. There's no way to stop the clock
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* in software, so we'll just have to note the fact that an
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* overflow happened and the next loaded timer value might
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* have wrapped. Also, this marks the end of frame, and the
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* still running counter can be used to determine the correct
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* time for the start of the reply.
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* time for the start of the reply.
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*/
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overflow = 1;
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@ -619,37 +623,37 @@ static void hitag_send_bit(int t0, int bit) {
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/* Manchester: Loaded, then unloaded */
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LED_A_ON();
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SHORT_COIL();
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while(TC1_CV < t0*15);
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while(AT91C_BASE_TC1->TC_CV < t0*15);
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OPEN_COIL();
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while(TC1_CV < t0*31);
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while(AT91C_BASE_TC1->TC_CV < t0*31);
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LED_A_OFF();
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} else if(bit == 0) {
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/* Manchester: Unloaded, then loaded */
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LED_B_ON();
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OPEN_COIL();
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while(TC1_CV < t0*15);
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while(AT91C_BASE_TC1->TC_CV < t0*15);
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SHORT_COIL();
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while(TC1_CV < t0*31);
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while(AT91C_BASE_TC1->TC_CV < t0*31);
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LED_B_OFF();
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}
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TC1_CCR = TC_CCR_SWTRG; /* Reset clock for the next bit */
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_SWTRG; /* Reset clock for the next bit */
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}
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static void hitag_send_frame(int t0, int frame_len, const char const * frame, int fdt)
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{
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OPEN_COIL();
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PIO_OUTPUT_ENABLE = (1 << GPIO_SSC_DOUT);
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AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
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/* Wait for HITAG_T_WRESP carrier periods after the last reader bit,
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* not that since the clock counts since the rising edge, but T_wresp is
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* with respect to the falling edge, we need to wait actually (T_wresp - T_g)
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* periods. The gap time T_g varies (4..10).
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* periods. The gap time T_g varies (4..10).
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*/
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while(TC1_CV < t0*(fdt-8));
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while(AT91C_BASE_TC1->TC_CV < t0*(fdt-8));
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int saved_cmr = TC1_CMR;
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TC1_CMR &= ~TC_CMR_ETRGEDG; /* Disable external trigger for the clock */
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TC1_CCR = TC_CCR_SWTRG; /* Reset the clock and use it for response timing */
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int saved_cmr = AT91C_BASE_TC1->TC_CMR;
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AT91C_BASE_TC1->TC_CMR &= ~AT91C_TC_ETRGEDG; /* Disable external trigger for the clock */
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AT91C_BASE_TC1->TC_CCR = AT91C_TC_SWTRG; /* Reset the clock and use it for response timing */
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int i;
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for(i=0; i<5; i++)
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@ -660,7 +664,7 @@ static void hitag_send_frame(int t0, int frame_len, const char const * frame, in
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}
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OPEN_COIL();
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TC1_CMR = saved_cmr;
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AT91C_BASE_TC1->TC_CMR = saved_cmr;
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}
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/* Callback structure to cleanly separate tag emulation code from the radio layer. */
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@ -813,13 +817,13 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
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m = sizeof(BigBuf);
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memset(dest,128,m);
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for(;;) {
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if(SSC_STATUS & (SSC_STATUS_TX_READY)) {
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SSC_TRANSMIT_HOLDING = 0x43;
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if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
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AT91C_BASE_SSC->SSC_THR = 0x43;
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if (ledcontrol)
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LED_D_ON();
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}
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if(SSC_STATUS & (SSC_STATUS_RX_READY)) {
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dest[i] = (BYTE)SSC_RECEIVE_HOLDING;
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if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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dest[i] = (BYTE)AT91C_BASE_SSC->SSC_RHR;
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// we don't care about actual value, only if it's more or less than a
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// threshold essentially we capture zero crossings for later analysis
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if(dest[i] < 127) dest[i] = 0; else dest[i] = 1;
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