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https://github.com/RfidResearchGroup/proxmark3.git
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parent
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21 changed files with 82 additions and 83 deletions
10
.vscode/setup.sh
vendored
10
.vscode/setup.sh
vendored
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@ -129,17 +129,17 @@ fi
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HOSTOS=$(uname | awk '{print toupper($0)}')
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HOSTOS=$(uname | awk '{print toupper($0)}')
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if [ "$HOSTOS" = "LINUX" ]; then
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if [ "$HOSTOS" = "LINUX" ]; then
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if uname -a|grep -q Microsoft; then
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if uname -a|grep -q Microsoft; then
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setup_wsl
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setup_wsl
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else
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else
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setup_linux
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setup_linux
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fi
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fi
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elif [ "$HOSTOS" = "DARWIN" ]; then
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elif [ "$HOSTOS" = "DARWIN" ]; then
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echo >&2 "[!!] MacOS not supported, sorry!"
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echo >&2 "[!!] MacOS not supported, sorry!"
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exit 1
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exit 1
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elif [[ "$HOSTOS" =~ MINGW(32|64)_NT* ]]; then
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elif [[ "$HOSTOS" =~ MINGW(32|64)_NT* ]]; then
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setup_ps
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setup_ps
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else
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else
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echo >&2 "[!!] Host OS not recognized, abort: $HOSTOS"
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echo >&2 "[!!] Host OS not recognized, abort: $HOSTOS"
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exit 1
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exit 1
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fi
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fi
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@ -95,43 +95,43 @@ void SetupSpi(int mode) {
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case SPI_FPGA_MODE:
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case SPI_FPGA_MODE:
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AT91C_BASE_SPI->SPI_MR =
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AT91C_BASE_SPI->SPI_MR =
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(0 << 24) | // Delay between chip selects (take default: 6 MCK periods)
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(0 << 24) | // Delay between chip selects (take default: 6 MCK periods)
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(0xE << 16) | // Peripheral Chip Select (selects FPGA SPI_NCS0 or PA11)
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(0xE << 16) | // Peripheral Chip Select (selects FPGA SPI_NCS0 or PA11)
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(0 << 7) | // Local Loopback Disabled
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(0 << 7) | // Local Loopback Disabled
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AT91C_SPI_MODFDIS | // Mode Fault Detection disabled
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AT91C_SPI_MODFDIS | // Mode Fault Detection disabled
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(0 << 2) | // Chip selects connected directly to peripheral
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(0 << 2) | // Chip selects connected directly to peripheral
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AT91C_SPI_PS_FIXED | // Fixed Peripheral Select
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AT91C_SPI_PS_FIXED | // Fixed Peripheral Select
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AT91C_SPI_MSTR; // Master Mode
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AT91C_SPI_MSTR; // Master Mode
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AT91C_BASE_SPI->SPI_CSR[0] =
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AT91C_BASE_SPI->SPI_CSR[0] =
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(1 << 24) | // Delay between Consecutive Transfers (32 MCK periods)
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(1 << 24) | // Delay between Consecutive Transfers (32 MCK periods)
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(1 << 16) | // Delay Before SPCK (1 MCK period)
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(1 << 16) | // Delay Before SPCK (1 MCK period)
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(6 << 8) | // Serial Clock Baud Rate (baudrate = MCK/6 = 24MHz/6 = 4M baud
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(6 << 8) | // Serial Clock Baud Rate (baudrate = MCK/6 = 24MHz/6 = 4M baud
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AT91C_SPI_BITS_16 | // Bits per Transfer (16 bits)
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AT91C_SPI_BITS_16 | // Bits per Transfer (16 bits)
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(0 << 3) | // Chip Select inactive after transfer
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(0 << 3) | // Chip Select inactive after transfer
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AT91C_SPI_NCPHA | // Clock Phase data captured on leading edge, changes on following edge
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AT91C_SPI_NCPHA | // Clock Phase data captured on leading edge, changes on following edge
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(0 << 0); // Clock Polarity inactive state is logic 0
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(0 << 0); // Clock Polarity inactive state is logic 0
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break;
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break;
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/*
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/*
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case SPI_LCD_MODE:
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case SPI_LCD_MODE:
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AT91C_BASE_SPI->SPI_MR =
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AT91C_BASE_SPI->SPI_MR =
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( 0 << 24) | // Delay between chip selects (take default: 6 MCK periods)
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( 0 << 24) | // Delay between chip selects (take default: 6 MCK periods)
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(0xB << 16) | // Peripheral Chip Select (selects LCD SPI_NCS2 or PA10)
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(0xB << 16) | // Peripheral Chip Select (selects LCD SPI_NCS2 or PA10)
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( 0 << 7) | // Local Loopback Disabled
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( 0 << 7) | // Local Loopback Disabled
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( 1 << 4) | // Mode Fault Detection disabled
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( 1 << 4) | // Mode Fault Detection disabled
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( 0 << 2) | // Chip selects connected directly to peripheral
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( 0 << 2) | // Chip selects connected directly to peripheral
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( 0 << 1) | // Fixed Peripheral Select
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( 0 << 1) | // Fixed Peripheral Select
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( 1 << 0); // Master Mode
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( 1 << 0); // Master Mode
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AT91C_BASE_SPI->SPI_CSR[2] =
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AT91C_BASE_SPI->SPI_CSR[2] =
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( 1 << 24) | // Delay between Consecutive Transfers (32 MCK periods)
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( 1 << 24) | // Delay between Consecutive Transfers (32 MCK periods)
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( 1 << 16) | // Delay Before SPCK (1 MCK period)
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( 1 << 16) | // Delay Before SPCK (1 MCK period)
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( 6 << 8) | // Serial Clock Baud Rate (baudrate = MCK/6 = 24MHz/6 = 4M baud
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( 6 << 8) | // Serial Clock Baud Rate (baudrate = MCK/6 = 24MHz/6 = 4M baud
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AT91C_SPI_BITS_9 | // Bits per Transfer (9 bits)
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AT91C_SPI_BITS_9 | // Bits per Transfer (9 bits)
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( 0 << 3) | // Chip Select inactive after transfer
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( 0 << 3) | // Chip Select inactive after transfer
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( 1 << 1) | // Clock Phase data captured on leading edge, changes on following edge
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( 1 << 1) | // Clock Phase data captured on leading edge, changes on following edge
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( 0 << 0); // Clock Polarity inactive state is logic 0
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( 0 << 0); // Clock Polarity inactive state is logic 0
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break;
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break;
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*/
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*/
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default:
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default:
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DisableSpi();
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DisableSpi();
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break;
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break;
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@ -379,7 +379,7 @@ set (TARGET_SOURCES
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${PM3_ROOT}/client/src/fileutils.c
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${PM3_ROOT}/client/src/fileutils.c
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${PM3_ROOT}/client/src/flash.c
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${PM3_ROOT}/client/src/flash.c
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${PM3_ROOT}/client/src/graph.c
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${PM3_ROOT}/client/src/graph.c
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${PM3_ROOT}/client/src/iso4217.c
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${PM3_ROOT}/client/src/iso4217.c
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${PM3_ROOT}/client/src/jansson_path.c
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${PM3_ROOT}/client/src/jansson_path.c
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${PM3_ROOT}/client/src/preferences.c
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${PM3_ROOT}/client/src/preferences.c
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${PM3_ROOT}/client/src/pm3.c
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${PM3_ROOT}/client/src/pm3.c
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@ -10,8 +10,8 @@ add_library(pm3rrg_rdv4_mbedtls STATIC
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../../common/mbedtls/error.c
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../../common/mbedtls/error.c
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../../common/mbedtls/ecp.c
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../../common/mbedtls/ecp.c
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../../common/mbedtls/ecdh.c
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../../common/mbedtls/ecdh.c
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../../common/mbedtls/ecc_point_compression.c
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../../common/mbedtls/ecc_point_compression.c
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../../common/mbedtls/gcm.c
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../../common/mbedtls/gcm.c
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../../common/mbedtls/ecp_curves.c
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../../common/mbedtls/ecp_curves.c
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../../common/mbedtls/certs.c
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../../common/mbedtls/certs.c
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../../common/mbedtls/camellia.c
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../../common/mbedtls/camellia.c
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@ -379,7 +379,7 @@ set (TARGET_SOURCES
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${PM3_ROOT}/client/src/fileutils.c
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${PM3_ROOT}/client/src/fileutils.c
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${PM3_ROOT}/client/src/flash.c
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${PM3_ROOT}/client/src/flash.c
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${PM3_ROOT}/client/src/graph.c
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${PM3_ROOT}/client/src/graph.c
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${PM3_ROOT}/client/src/iso4217.c
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${PM3_ROOT}/client/src/iso4217.c
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${PM3_ROOT}/client/src/jansson_path.c
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${PM3_ROOT}/client/src/jansson_path.c
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${PM3_ROOT}/client/src/preferences.c
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${PM3_ROOT}/client/src/preferences.c
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${PM3_ROOT}/client/src/pm3.c
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${PM3_ROOT}/client/src/pm3.c
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@ -25,7 +25,6 @@
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"description": "iPhones before IOS17 emit this frame so that other Apple devices don't react to the field during background reading. Also emitted during NFCReaderSession subtypes"
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"description": "iPhones before IOS17 emit this frame so that other Apple devices don't react to the field during background reading. Also emitted during NFCReaderSession subtypes"
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},
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},
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{
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{
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"value": "6a02c801000300000000000000",
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"value": "6a02c801000300000000000000",
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"name": "Transit: Ventra",
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"name": "Transit: Ventra",
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@ -690,7 +690,7 @@ static int CmdSetDivisor(const char *Cmd) {
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CLIParserFree(ctx);
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CLIParserFree(ctx);
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if (arg < 19) {
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if (arg < 19) {
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PrintAndLogEx(ERR, "Divisor must be between" _YELLOW_("19") " and " _YELLOW_("255"));
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PrintAndLogEx(ERR, "Divisor must be between " _YELLOW_("19") " and " _YELLOW_("255"));
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return PM3_EINVARG;
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return PM3_EINVARG;
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}
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}
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// 12 000 000 (12MHz)
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// 12 000 000 (12MHz)
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