Removed commented out includes

Include statements in individual files are not required when compiling the code the correct way as a project with an explicitly defined work library. The Makefile exactly replicates the compilation process of the ISE environment and generates the required project files.

fpga/fpga_icopyx_hf.v

@@ -20,14 +20,6 @@
 // frequency modes, the FPGA might perform some demodulation first, to
 // reduce the amount of data that we must send to the ARM.
 //-----------------------------------------------------------------------------
-//`include "define.v"
-
-//`include "hi_reader.v"
-//`include "hi_simulate.v"
-//`include "hi_iso14443a.v"
-//`include "hi_flite.v"
-//`include "hi_sniffer.v"
-//`include "hi_get_trace.v"
 
 module fpga_hf(
     input spck,

fpga/fpga_icopyx_lf.v

@@ -20,13 +20,6 @@
 // frequency modes, the FPGA might perform some demodulation first, to
 // reduce the amount of data that we must send to the ARM.
 //-----------------------------------------------------------------------------
-//`include "define.v"
-
-//`include "lo_read.v"
-//`include "lo_passthru.v"
-//`include "lo_edge_detect.v"
-//`include "lo_adc.v"
-//`include "clk_divider.v"
 
 module fpga_lf(
     input spck,

fpga/fpga_icopyx_top.v

@@ -20,11 +20,6 @@
 // frequency modes, the FPGA might perform some demodulation first, to
 // reduce the amount of data that we must send to the ARM.
 //-----------------------------------------------------------------------------
-//`include "fpga_lf.v"
-//`include "fpga_hf.v"
-//`include "mux2_onein.v"
-//`include "mux2_oneout.v"
-//`include "util.v"
 
 module fpga_top(
     input spck,

fpga/fpga_pm3_top.v

@@ -20,18 +20,8 @@
 // frequency modes, the FPGA might perform some demodulation first, to
 // reduce the amount of data that we must send to the ARM.
 //-----------------------------------------------------------------------------
-/*
-Once upon a time the FPGA had a 16 input mux so we could have all LF and HF modules enabled and selectable
-As the functionality grew, we run out of space in the FPGA and we had to split into an "LF only" and an "HF only" FPGA bitstream
-But even then after a while it was not possible to fit all the HF functions at the same time so now we have multiple "HF only" bitstreams
-For example "Felica but without ISO14443", or "ISO14443 but without Felica" or "HF_15 but without Felica and ISO14443"
 
-Because of all of the above, you can not enable both HF and LF modes at the same time, because some LF modules outputs
+// These defines are for reference only, they are passed by the Makefile so do not uncomment them here
-map to the same mux inputs as some HF modules outputs (thanks to reducing the mux from 16 to 8 inputs) and you can not have
-multiple outputs connected together therefore leading to a failed compilation
-*/
-
-// These defines are meant to be passed by the Makefile so do not uncomment them here
 // Proxmark3 RDV4 target
 //`define PM3RDV4
 // Proxmark3 generic target
@@ -64,9 +54,6 @@ multiple outputs connected together therefore leading to a failed compilation
 // WITH_HF5 enables module get trace
 //`define WITH_HF5
 
-//`include "define.v"
-//`include "util.v"
-//
 //`ifdef WITH_LF  `include "clk_divider.v"    `endif
 //`ifdef WITH_LF0 `include "lo_read.v"        `endif
 //`ifdef WITH_LF1 `include "lo_edge_detect.v" `endif

fpga/hi_get_trace.v

@@ -13,7 +13,6 @@
 //
 // See LICENSE.txt for the text of the license.
 //-----------------------------------------------------------------------------
-//`include "define.v"
 
 module hi_get_trace(
     input ck_1356megb,

fpga/hi_iso14443a.v

@@ -14,7 +14,6 @@
 // See LICENSE.txt for the text of the license.
 //-----------------------------------------------------------------------------
 // ISO14443-A support for the Proxmark III
-//`include "define.v"
 
 module hi_iso14443a(
     input ck_1356meg,

fpga/hi_simulate.v

@@ -30,7 +30,6 @@
 //
 // Jonathan Westhues, October 2006
 //-----------------------------------------------------------------------------
-//`include "define.v"
 
 module hi_simulate(
     input ck_1356meg,

fpga/lf_edge_detect.v

@@ -15,9 +15,6 @@
 // See LICENSE.txt for the text of the license.
 //-----------------------------------------------------------------------------
 
-// input clk is 24MHz
-//`include "min_max_tracker.v"
-
 module lf_edge_detect(
     input clk,
     input [7:0] adc_d,

fpga/lo_edge_detect.v

@@ -25,9 +25,6 @@
 // - ssp_frame (wired to TIOA1 on the arm) for the edge detection/state
 // - ssp_clk: cross_lo
 
-//`include "lp20khz_1MSa_iir_filter.v"
-//`include "lf_edge_detect.v"
-
 module lo_edge_detect(
     input pck0,
     input pck_divclk,

fpga/mux16.v

@@ -13,9 +13,6 @@
 //
 // See LICENSE.txt for the text of the license.
 //-----------------------------------------------------------------------------
-//
-// General-purpose miscellany.
-//
 
 // 16 inputs to 1 output multiplexer
 module mux16(

fpga/mux2_onein.v

@@ -1,9 +1,20 @@
 //-----------------------------------------------------------------------------
-// Two way MUX.
+// Copyright (C) Proxmark3 contributors. See AUTHORS.md for details.
 //
-// kombi, 2020.05
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+// See LICENSE.txt for the text of the license.
 //-----------------------------------------------------------------------------
 
+// 2 inputs to 1 output multiplexer
 module mux2_one(
     input [1:0] sel,
     output reg y,

fpga/mux2_oneout.v

@@ -1,9 +1,20 @@
 //-----------------------------------------------------------------------------
-// Two way MUX.
+// Copyright (C) Proxmark3 contributors. See AUTHORS.md for details.
 //
-// kombi, 2020.05
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+// See LICENSE.txt for the text of the license.
 //-----------------------------------------------------------------------------
 
+// 1 input to 2 outputs multiplexer
 module mux2_oneout(
     input [1:0] sel,
     input y,

fpga/mux8.v

@@ -13,9 +13,6 @@
 //
 // See LICENSE.txt for the text of the license.
 //-----------------------------------------------------------------------------
-//
-// General-purpose miscellany.
-//
 
 // 8 inputs to 1 output multiplexer
 module mux8(