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CHG: command name changes..
old "hf legic info" is now "hf legic reader" old "hf legic read" is now "hf legic rdmem" old "hf legic decode" is now "hf legic info" ADD: new command "hf legic dump", which will autodetect tagtype and dump all mem to a binary file.
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b9e8854a8b
commit
633d068682
5 changed files with 104 additions and 71 deletions
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@ -140,14 +140,13 @@ static void frame_clean(struct legic_frame * const f) {
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/* Generate Keystream */
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uint32_t get_key_stream(int skip, int count) {
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uint32_t key = 0;
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int i;
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// Use int to enlarge timer tc to 32bit
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legic_prng_bc += prng_timer->TC_CV;
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// reset the prng timer.
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ResetTimer(prng_timer);
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/* If skip == -1, forward prng time based */
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if(skip == -1) {
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@ -161,55 +160,41 @@ uint32_t get_key_stream(int skip, int count) {
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i = (count == 6) ? -1 : legic_read_count;
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/* Write Time Data into LOG */
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// uint8_t *BigBuf = BigBuf_get_addr();
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// BigBuf[OFFSET_LOG+128+i] = legic_prng_count();
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// BigBuf[OFFSET_LOG+256+i*4] = (legic_prng_bc >> 0) & 0xff;
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// BigBuf[OFFSET_LOG+256+i*4+1] = (legic_prng_bc >> 8) & 0xff;
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// BigBuf[OFFSET_LOG+256+i*4+2] = (legic_prng_bc >>16) & 0xff;
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// BigBuf[OFFSET_LOG+256+i*4+3] = (legic_prng_bc >>24) & 0xff;
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// BigBuf[OFFSET_LOG+384+i] = count;
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// log
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//uint8_t cmdbytes[] = {bits, BYTEx(data, 0), BYTEx(data, 1), BYTEx(send, 0), BYTEx(send, 1), legic_prng_count()};
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//LogTrace(cmdbytes, sizeof(cmdbytes), starttime, GET_TICKS, NULL, TRUE);
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/* Generate KeyStream */
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for(i=0; i<count; i++) {
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key |= legic_prng_get_bit() << i;
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legic_prng_forward(1);
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}
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return key;
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return legic_prng_get_bits(count);
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}
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/* Send a frame in tag mode, the FPGA must have been set up by
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* LegicRfSimulate
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*/
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void frame_send_tag(uint16_t response, uint8_t bits, uint8_t crypt) {
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void frame_send_tag(uint16_t response, uint8_t bits) {
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uint16_t mask = 1;
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/* Bitbang the response */
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LOW(GPIO_SSC_DOUT);
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SHORT_COIL;
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AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
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AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
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/* Use time to crypt frame */
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if(crypt) {
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legic_prng_forward(2); /* TAG_FRAME_WAIT -> shift by 2 */
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response ^= legic_prng_get_bits(bits);
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}
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/* TAG_FRAME_WAIT -> shift by 2 */
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legic_prng_forward(2);
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response ^= legic_prng_get_bits(bits);
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/* Wait for the frame start */
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WaitUS( TAG_FRAME_WAIT );
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WaitTicks( TAG_FRAME_WAIT );
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uint8_t bit = 0;
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for(int i = 0; i < bits; i++) {
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bit = response & 1;
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response >>= 1;
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if (bit)
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HIGH(GPIO_SSC_DOUT);
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for (; mask < BITMASK(bits); mask <<= 1) {
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if (send & mask)
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OPEN_COIL;
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else
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LOW(GPIO_SSC_DOUT);
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WaitUS(100);
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SHORT_COIL;
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WaitTicks(TAG_BIT_PERIOD);
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}
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LOW(GPIO_SSC_DOUT);
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SHORT_COIL;
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}
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/* Send a frame in reader mode, the FPGA must have been set up by
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@ -775,26 +760,26 @@ static void frame_handle_tag(struct legic_frame const * const f)
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{
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uint8_t *BigBuf = BigBuf_get_addr();
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/* First Part of Handshake (IV) */
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if(f->bits == 7) {
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/* First Part of Handshake (IV) */
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if(f->bits == 7) {
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LED_C_ON();
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LED_C_ON();
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// Reset prng timer
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ResetTimer(prng_timer);
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legic_prng_init(f->data);
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frame_send_tag(0x3d, 6, 1); /* 0x3d^0x26 = 0x1B */
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legic_state = STATE_IV;
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legic_read_count = 0;
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legic_prng_bc = 0;
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legic_prng_iv = f->data;
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legic_prng_init(f->data);
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frame_send_tag(0x3d, 6); /* 0x3d^0x26 = 0x1B */
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legic_state = STATE_IV;
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legic_read_count = 0;
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legic_prng_bc = 0;
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legic_prng_iv = f->data;
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ResetTimer(timer);
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WaitUS(280);
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return;
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}
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return;
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}
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/* 0x19==??? */
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if(legic_state == STATE_IV) {
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@ -828,7 +813,7 @@ static void frame_handle_tag(struct legic_frame const * const f)
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//Dbprintf("Data:%03.3x, key:%03.3x, addr: %03.3x, read_c:%u", f->data, key, addr, read_c);
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legic_prng_forward(legic_reqresp_drift);
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frame_send_tag(hash | data, 12, 1);
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frame_send_tag(hash | data, 12);
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ResetTimer(timer);
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legic_prng_forward(2);
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