diff --git a/armsrc/hfsnoop.c b/armsrc/hfsnoop.c index 98ccd2bb7..121f100c5 100644 --- a/armsrc/hfsnoop.c +++ b/armsrc/hfsnoop.c @@ -13,18 +13,13 @@ static void RAMFUNC optimizedSnoop(void) uint16_t *dest = (uint16_t *)BigBuf_get_addr(); uint16_t *destend = dest + n-1; - AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(16); // Setting Frame mode, 16 bits per word // Reading data loop - while(dest <= destend) - { - if(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) - { + while(dest <= destend) { + if(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) { *dest = (uint16_t)(AT91C_BASE_SSC->SSC_RHR); dest++; } } - //Resetting Frame mode (First set in fpgaloader.c) - AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(8) | AT91C_SSC_MSBF | SSC_FRAME_MODE_WORDS_PER_TRANSFER(0); //setting tracelen - importsnt! it was set by buffer overflow before set_tracelen( BigBuf_max_traceLen()); } @@ -50,9 +45,9 @@ void HfSnoop(int samplesToSkip, int triggersToSkip) trigger_cnt = 0; uint16_t r = 0; - while(!BUTTON_PRESS() && !usb_poll_validate_length() ) { + while (!BUTTON_PRESS() && !usb_poll_validate_length() ) { WDT_HIT(); - if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { + if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { r = (uint16_t)AT91C_BASE_SSC->SSC_RHR; r = MAX(r & 0xff, r >> 8); if (r >= 180) { @@ -62,7 +57,7 @@ void HfSnoop(int samplesToSkip, int triggersToSkip) } } - if(!BUTTON_PRESS()) { + if (!BUTTON_PRESS()) { int waitcount = samplesToSkip; // lets wait 40000 ticks of pck0 while(waitcount != 0) { @@ -73,6 +68,9 @@ void HfSnoop(int samplesToSkip, int triggersToSkip) Dbprintf("Trigger kicked! Value: %d, Dumping Samples Hispeed now.", r); } + //Resetting Frame mode (First set in fpgaloader.c) + AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(8) | AT91C_SSC_MSBF | SSC_FRAME_MODE_WORDS_PER_TRANSFER(0); + DbpString("HF Snoop end"); FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); LED_D_OFF(); diff --git a/armsrc/lfops.c b/armsrc/lfops.c index 5c79f9e50..c18c6156c 100644 --- a/armsrc/lfops.c +++ b/armsrc/lfops.c @@ -319,6 +319,9 @@ void AcquireTiType(void) } } } + + // reset SSC + FpgaSetupSsc(); } // arguments: 64bit data split into 32bit idhi:idlo and optional 16bit crc