mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-21 13:53:55 -07:00
initial commit to be in sync the-soon-defunct repo pm3rdv40.
This commit is contained in:
parent
905df58cc3
commit
5f77121694
34 changed files with 709 additions and 508 deletions
|
@ -449,14 +449,12 @@ static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len) {
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// loop is a wait/delay ?
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/*
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for(uint8_t c = 0; c < 10;) {
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// keep tx buffer in a defined state anyway.
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if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
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AT91C_BASE_SSC->SSC_THR = 0xFF;
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++c;
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}
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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b = (uint16_t)(AT91C_BASE_SSC->SSC_RHR); (void)b;
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}
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}
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*/
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// Now run a `software UART' on the stream of incoming samples.
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@ -466,8 +464,16 @@ static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len) {
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while( !BUTTON_PRESS() ) {
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WDT_HIT();
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// keep tx buffer in a defined state anyway.
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
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AT91C_BASE_SSC->SSC_THR = 0x00;
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}
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// Wait for byte be become available in rx holding register
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if ( AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY ) {
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b = (uint8_t) AT91C_BASE_SSC->SSC_RHR;
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for ( mask = 0x80; mask != 0; mask >>= 1) {
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if ( Handle14443bReaderUartBit(b & mask)) {
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*len = Uart.byteCnt;
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@ -494,7 +500,7 @@ void ClearFpgaShiftingRegisters(void){
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// wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
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for (uint8_t j = 0; j < 5; j++) { // allow timeout - better late than never
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while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
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while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) {};
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if (AT91C_BASE_SSC->SSC_RHR) break;
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}
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@ -531,9 +537,13 @@ static void TransmitFor14443b_AsTag( uint8_t *response, uint16_t len) {
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// Transmit the response.
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for(uint16_t i = 0; i < len;) {
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// Put byte into tx holding register as soon as it is ready
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if(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
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AT91C_BASE_SSC->SSC_THR = response[++i];
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}
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// Prevent rx holding register from overflowing
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if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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b = AT91C_BASE_SSC->SSC_RHR;(void)b;
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}
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@ -550,10 +560,10 @@ void SimulateIso14443bTag(uint32_t pupi) {
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// setup device.
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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// Set up the synchronous serial port
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FpgaSetupSsc();
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// connect Demodulated Signal to ADC:
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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// Set up the synchronous serial port
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FpgaSetupSsc();
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// allocate command receive buffer
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BigBuf_free(); BigBuf_Clear_ext(false);
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@ -786,6 +796,7 @@ static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) {
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CHECK_FOR_SUBCARRIER();
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// subcarrier detected
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if (v > SUBCARRIER_DETECT_THRESHOLD) {
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Demod.state = DEMOD_PHASE_REF_TRAINING;
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Demod.sumI = ci;
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@ -987,10 +998,6 @@ static void GetTagSamplesFor14443bDemod() {
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if ( upTo )
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upTo = NULL;
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// print the last batch of IQ values from FPGA
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if (MF_DBGLEVEL == 4)
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Dbhexdump(ISO14443B_DMA_BUFFER_SIZE, (uint8_t *)dmaBuf, false);
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if ( Demod.len > 0 )
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LogTrace(Demod.output, Demod.len, time_0, time_stop, NULL, false);
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}
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@ -999,20 +1006,10 @@ static void GetTagSamplesFor14443bDemod() {
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// Transmit the command (to the tag) that was placed in ToSend[].
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//-----------------------------------------------------------------------------
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static void TransmitFor14443b_AsReader(void) {
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// we could been in following mode:
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// FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ
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// if its second call or more
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// while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
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// AT91C_BASE_SSC->SSC_THR = 0XFF;
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// }
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int c;
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volatile uint32_t b;
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
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SpinDelay(40);
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SpinDelay(60);
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// What does this loop do? Is it TR1?
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// 0xFF = 8 bits of 1. 1 bit == 1Etu,..
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@ -1020,27 +1017,21 @@ static void TransmitFor14443b_AsReader(void) {
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// 80*9 = 720us.
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for(c = 0; c < 50;) {
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if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
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AT91C_BASE_SSC->SSC_THR = 0xFF;
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c++;
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}
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if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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b = AT91C_BASE_SSC->SSC_RHR; (void)b;
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}
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}
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// Send frame loop
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for(c = 0; c < ToSendMax;) {
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// Put byte into tx holding register as soon as it is ready
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
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AT91C_BASE_SSC->SSC_THR = ToSend[c++];
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}
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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b = AT91C_BASE_SSC->SSC_RHR; (void)b;
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}
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}
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//WaitForFpgaDelayQueueIsEmpty(delay);
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// We should wait here for the FPGA to send all bits.
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WDT_HIT();
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}
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@ -1188,7 +1179,8 @@ uint8_t iso14443b_select_srx_card(iso14b_card_select_t *card ) {
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CodeAndTransmit14443bAsReader(init_srx, sizeof(init_srx));
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GetTagSamplesFor14443bDemod(); //no
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if (Demod.len == 0) return 2;
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if (Demod.len == 0)
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return 2;
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// Randomly generated Chip ID
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if (card) card->chipid = Demod.output[0];
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@ -1200,16 +1192,16 @@ uint8_t iso14443b_select_srx_card(iso14b_card_select_t *card ) {
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CodeAndTransmit14443bAsReader(select_srx, sizeof(select_srx));
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GetTagSamplesFor14443bDemod(); //no
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if (Demod.len != 3) return 2;
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if (Demod.len != 3)
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return 2;
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// Check the CRC of the answer:
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if (!check_crc(CRC_14443_B, Demod.output, Demod.len)) {
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if (MF_DBGLEVEL > 1) Dbprintf("crc fail ice2");
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if (!check_crc(CRC_14443_B, Demod.output, Demod.len))
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return 3;
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}
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// Check response from the tag: should be the same UID as the command we just sent:
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if (select_srx[1] != Demod.output[0]) return 1;
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if (select_srx[1] != Demod.output[0])
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return 1;
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// First get the tag's UID:
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select_srx[0] = ISO14443B_GET_UID;
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@ -1218,13 +1210,12 @@ uint8_t iso14443b_select_srx_card(iso14b_card_select_t *card ) {
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CodeAndTransmit14443bAsReader(select_srx, 3); // Only first three bytes for this one
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GetTagSamplesFor14443bDemod(); //no
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if (Demod.len != 10) return 2;
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if (Demod.len != 10)
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return 2;
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// The check the CRC of the answer
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if (!check_crc(CRC_14443_B, Demod.output, Demod.len)) {
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if (MF_DBGLEVEL > 1) Dbprintf("crc fail ice3");
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if (!check_crc(CRC_14443_B, Demod.output, Demod.len))
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return 3;
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}
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if (card) {
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card->uidlen = 8;
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@ -1251,13 +1242,12 @@ uint8_t iso14443b_select_card(iso14b_card_select_t *card ) {
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GetTagSamplesFor14443bDemod(); //select_card
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// ATQB too short?
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if (Demod.len < 14) return 2;
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if (Demod.len < 14)
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return 2;
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// VALIDATE CRC
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if (!check_crc(CRC_14443_B, Demod.output, Demod.len)) {
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if (MF_DBGLEVEL > 3) Dbprintf("iso1443b_setup crc fail");
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if (!check_crc(CRC_14443_B, Demod.output, Demod.len))
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return 3;
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}
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if (card) {
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card->uidlen = 4;
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@ -1276,13 +1266,12 @@ uint8_t iso14443b_select_card(iso14b_card_select_t *card ) {
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GetTagSamplesFor14443bDemod();//select_card
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// Answer to ATTRIB too short?
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if(Demod.len < 3) return 2;
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if(Demod.len < 3)
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return 2;
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// VALIDATE CRC
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if (!check_crc(CRC_14443_B, Demod.output, Demod.len) ) {
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if (MF_DBGLEVEL > 3) Dbprintf("iso1443b_setup crc2 fail");
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if (!check_crc(CRC_14443_B, Demod.output, Demod.len) )
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return 3;
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}
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if (card) {
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@ -1314,11 +1303,8 @@ uint8_t iso14443b_select_card(iso14b_card_select_t *card ) {
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// Set up ISO 14443 Type B communication (similar to iso14443a_setup)
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// field is setup for "Sending as Reader"
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void iso14443b_setup() {
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if (MF_DBGLEVEL > 3) Dbprintf("iso1443b_setup Enter");
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LEDsoff();
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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//BigBuf_free();
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//BigBuf_Clear_ext(false);
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// Initialize Demod and Uart structs
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DemodInit(BigBuf_malloc(MAX_FRAME_SIZE));
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@ -1332,13 +1318,12 @@ void iso14443b_setup() {
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// Signal field is on with the appropriate LED
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
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SpinDelay(300);
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SpinDelay(100);
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// Start the timer
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StartCountSspClk();
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LED_D_ON();
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if (MF_DBGLEVEL > 3) Dbprintf("iso1443b_setup Exit");
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}
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//-----------------------------------------------------------------------------
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@ -1350,91 +1335,42 @@ void iso14443b_setup() {
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//
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// I tried to be systematic and check every answer of the tag, every CRC, etc...
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//-----------------------------------------------------------------------------
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static bool ReadSTBlock(uint8_t block) {
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uint8_t cmd[] = {ISO14443B_READ_BLK, block, 0x00, 0x00};
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AddCrc14B(cmd, 2);
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CodeAndTransmit14443bAsReader(cmd, sizeof(cmd));
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GetTagSamplesFor14443bDemod();
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// Check if we got an answer from the tag
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if (Demod.len != 6) {
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DbpString("[!] expected 6 bytes from tag, got less...");
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return false;
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}
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// The check the CRC of the answer
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if (!check_crc(CRC_14443_B, Demod.output, Demod.len)) {
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DbpString("[!] CRC Error block!");
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return false;
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}
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return true;
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}
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void ReadSTMemoryIso14443b(uint8_t numofblocks) {
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// Make sure that we start from off, since the tags are stateful;
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// confusing things will happen if we don't reset them between reads.
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switch_off();
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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FpgaSetupSsc();
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set_tracing(true);
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// Now give it time to spin up.
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// Signal field is on with the appropriate LED
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LED_D_ON();
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
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SpinDelay(100);
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//switch_off();
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uint8_t i = 0x00;
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uint8_t *buf = BigBuf_malloc(sizeof(iso14b_card_select_t));
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// First command: wake up the tag using the INITIATE command
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uint8_t cmd1[] = {ISO14443B_INITIATE, 0x00, 0x97, 0x5b};
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CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); //no
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GetTagSamplesFor14443bDemod(); // no
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if (Demod.len == 0) {
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DbpString("[!] No response from tag");
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set_tracing(false);
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return;
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} else {
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Dbprintf("Randomly generated Chip ID (+ 2 byte CRC): %02x %02x %02x",
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Demod.output[0], Demod.output[1], Demod.output[2]);
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}
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// There is a response, SELECT the uid
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DbpString("[!] SELECT tag:");
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cmd1[0] = ISO14443B_SELECT; // 0x0E is SELECT
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cmd1[1] = Demod.output[0];
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AddCrc14B(cmd1, 2);
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CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); //no
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GetTagSamplesFor14443bDemod(); //no
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if (Demod.len != 3) {
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Dbprintf("[!] expected 3 bytes from tag, got %d", Demod.len);
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set_tracing(false);
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return;
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}
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// Check the CRC of the answer:
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iso14443b_setup();
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if (!check_crc(CRC_14443_B, Demod.output, Demod.len)) {
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DbpString("[!] CRC Error reading select response.");
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set_tracing(false);
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return;
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}
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// Check response from the tag: should be the same UID as the command we just sent:
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if (cmd1[1] != Demod.output[0]) {
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Dbprintf("[!] Bad response to SELECT from Tag, aborting: %02x %02x", cmd1[1], Demod.output[0]);
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set_tracing(false);
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return;
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}
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iso14b_card_select_t *card = (iso14b_card_select_t*)buf;
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uint8_t res = iso14443b_select_srx_card(card);
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// Tag is now selected,
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// First get the tag's UID:
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cmd1[0] = ISO14443B_GET_UID;
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AddCrc14B(cmd1, 1);
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CodeAndTransmit14443bAsReader(cmd1, 3); // no -- Only first three bytes for this one
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GetTagSamplesFor14443bDemod(); //no
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if (Demod.len != 10) {
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Dbprintf("[!] expected 10 bytes from tag, got %d", Demod.len);
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set_tracing(false);
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return;
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}
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// The check the CRC of the answer (use cmd1 as temporary variable):
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// 0: OK 2: attrib fail, 3:crc fail,
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if ( res > 0 ) goto out;
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if (!check_crc(CRC_14443_B, Demod.output, Demod.len)) {
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Dbprintf("[!] CRC Error reading block! Expected: %04x got: %04x", (cmd1[2]<<8)+cmd1[3], (Demod.output[8]<<8)+Demod.output[9]);
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// Do not return;, let's go on... (we should retry, maybe ?)
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}
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Dbprintf("[+] Tag UID (64 bits): %08x %08x",
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(Demod.output[7]<<24) + (Demod.output[6]<<16) + (Demod.output[5]<<8) + Demod.output[4],
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(Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0]);
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// Now loop to read all 16 blocks, address from 0 to last block
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Dbprintf("[+] Tag memory dump, block 0 to %d", numofblocks);
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cmd1[0] = 0x08;
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i = 0x00;
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++numofblocks;
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for (;;) {
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@ -1442,22 +1378,16 @@ void ReadSTMemoryIso14443b(uint8_t numofblocks) {
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DbpString("System area block (0xFF):");
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i = 0xff;
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}
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cmd1[1] = i;
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AddCrc14B(cmd1, 2);
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CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); //no
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GetTagSamplesFor14443bDemod(); //no
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uint8_t retries = 3;
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do {
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res = ReadSTBlock(i);
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} while (!res && --retries);
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if (Demod.len != 6) { // Check if we got an answer from the tag
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DbpString("[!] expected 6 bytes from tag, got less...");
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return;
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}
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// The check the CRC of the answer (use cmd1 as temporary variable):
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if (!check_crc(CRC_14443_B, Demod.output, Demod.len)) {
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Dbprintf("[!] CRC Error reading block! Expected: %04x got: %04x",
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(cmd1[2]<<8)+cmd1[3], (Demod.output[4]<<8)+Demod.output[5]);
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// Do not return;, let's go on... (we should retry, maybe ?)
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if (!res && !retries) {
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goto out;
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}
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// Now print out the memory location:
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Dbprintf("Address=%02x, Contents=%08x, CRC=%04x", i,
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||||
(Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0],
|
||||
|
@ -1467,11 +1397,13 @@ void ReadSTMemoryIso14443b(uint8_t numofblocks) {
|
|||
++i;
|
||||
}
|
||||
|
||||
set_tracing(false);
|
||||
out:
|
||||
switch_off(); // disconnect raw
|
||||
SpinDelay(20);
|
||||
}
|
||||
|
||||
static void iso1444b_setup_sniff(void){
|
||||
if (MF_DBGLEVEL > 3) Dbprintf("iso1443b_setup_sniff Enter");
|
||||
|
||||
LEDsoff();
|
||||
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
|
||||
BigBuf_free();
|
||||
|
@ -1504,8 +1436,6 @@ static void iso1444b_setup_sniff(void){
|
|||
|
||||
// Start the SSP timer
|
||||
StartCountSspClk();
|
||||
|
||||
if (MF_DBGLEVEL > 3) Dbprintf("iso1443b_setup_sniff Exit");
|
||||
}
|
||||
|
||||
//=============================================================================
|
||||
|
@ -1596,7 +1526,7 @@ void RAMFUNC SniffIso14443b(void) {
|
|||
|
||||
// is this | 0x01 the error? & 0xfe in https://github.com/Proxmark/proxmark3/issues/103
|
||||
// LSB is a fpga signal bit.
|
||||
if (Handle14443bTagSamplesDemod(ci >> 1, cq >> 1)) {
|
||||
if (Handle14443bTagSamplesDemod(ci, cq)) {
|
||||
time_stop = GetCountSspClk() - time_0;
|
||||
LogTrace(Demod.output, Demod.len, time_start, time_stop, NULL, false);
|
||||
UartReset();
|
||||
|
@ -1647,10 +1577,8 @@ void SendRawCommand14443B_Ex(UsbCommand *c) {
|
|||
iso14b_set_trigger(true);
|
||||
|
||||
if ((param & ISO14B_CONNECT) == ISO14B_CONNECT) {
|
||||
// Make sure that we start from off, since the tags are stateful;
|
||||
// confusing things will happen if we don't reset them between reads.
|
||||
//switch_off(); // before connect in raw
|
||||
iso14443b_setup();
|
||||
clear_trace();
|
||||
}
|
||||
|
||||
set_tracing(true);
|
||||
|
@ -1660,15 +1588,15 @@ void SendRawCommand14443B_Ex(UsbCommand *c) {
|
|||
status = iso14443b_select_card(card);
|
||||
cmd_send(CMD_ACK, status, sendlen, 0, buf, sendlen);
|
||||
// 0: OK 2: attrib fail, 3:crc fail,
|
||||
if ( status > 0 ) return;
|
||||
if ( status > 0 ) goto out;
|
||||
}
|
||||
|
||||
if ((param & ISO14B_SELECT_SR) == ISO14B_SELECT_SR) {
|
||||
iso14b_card_select_t *card = (iso14b_card_select_t*)buf;
|
||||
status = iso14443b_select_srx_card(card);
|
||||
cmd_send(CMD_ACK, status, sendlen, 0, buf, sendlen);
|
||||
// 0: OK 2: attrib fail, 3:crc fail,
|
||||
if ( status > 0 ) return;
|
||||
// 0: OK 2: demod fail, 3:crc fail,
|
||||
if ( status > 0 ) goto out;
|
||||
}
|
||||
|
||||
if ((param & ISO14B_APDU) == ISO14B_APDU) {
|
||||
|
@ -1690,6 +1618,7 @@ void SendRawCommand14443B_Ex(UsbCommand *c) {
|
|||
cmd_send(CMD_ACK, status, sendlen, 0, Demod.output, sendlen);
|
||||
}
|
||||
|
||||
out:
|
||||
// turn off trigger (LED_A)
|
||||
if ((param & ISO14B_REQUEST_TRIGGER) == ISO14B_REQUEST_TRIGGER)
|
||||
iso14b_set_trigger(false);
|
||||
|
@ -1697,11 +1626,7 @@ void SendRawCommand14443B_Ex(UsbCommand *c) {
|
|||
// turn off antenna et al
|
||||
// we don't send a HALT command.
|
||||
if ((param & ISO14B_DISCONNECT) == ISO14B_DISCONNECT) {
|
||||
if (MF_DBGLEVEL > 2) Dbprintf("disconnect");
|
||||
switch_off(); // disconnect raw
|
||||
SpinDelay(20);
|
||||
} else {
|
||||
//FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
|
||||
}
|
||||
|
||||
}
|
Loading…
Add table
Add a link
Reference in a new issue