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Newer Atmel define file, fixes some typos, adds a few new defines
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Alex
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4e411bec22
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1 changed files with 150 additions and 134 deletions
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@ -1,7 +1,7 @@
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// ----------------------------------------------------------------------------
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// ATMEL Microcontroller Software Support - ROUSSET -
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// ----------------------------------------------------------------------------
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// Copyright (c) 2006, Atmel Corporation
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// Copyright (c) 2008, Atmel Corporation
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//
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// All rights reserved.
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//
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@ -27,14 +27,14 @@
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// ----------------------------------------------------------------------------
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// File Name : AT91SAM7S512.h
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// Object : AT91SAM7S512 definitions
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// Generated : AT91 SW Application Group 07/07/2008 (16:13:20)
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// Generated : AT91 SW Application Group 01/23/2009 (11:51:35)
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//
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// CVS Reference : /AT91SAM7S512.pl/1.6/Wed Aug 30 14:08:44 2006//
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// CVS Reference : /AT91SAM7S512.pl/1.6/Wed Jan 21 10:52:45 2009//
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// CVS Reference : /SYS_SAM7S.pl/1.2/Thu Feb 3 10:47:39 2005//
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// CVS Reference : /MC_SAM7SE.pl/1.10/Thu Feb 16 16:35:28 2006//
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// CVS Reference : /PMC_SAM7S_USB.pl/1.4/Tue Feb 8 14:00:19 2005//
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// CVS Reference : /RSTC_SAM7S.pl/1.2/Wed Jul 13 15:25:17 2005//
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// CVS Reference : /UDP_4ept.pl/1.1/Thu Aug 3 12:26:00 2006//
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// CVS Reference : /UDP_4ept.pl/1.1/Wed Jan 21 10:53:24 2009//
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// CVS Reference : /PWM_SAM7S.pl/1.1/Tue May 10 12:38:54 2005//
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// CVS Reference : /AIC_6075B.pl/1.3/Fri May 20 14:21:42 2005//
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// CVS Reference : /PIO_6057A.pl/1.2/Thu Feb 3 10:29:42 2005//
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@ -48,7 +48,7 @@
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// CVS Reference : /US_6089C.pl/1.1/Mon Jan 31 13:56:02 2005//
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// CVS Reference : /SSC_6078A.pl/1.1/Tue Jul 13 07:10:41 2004//
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// CVS Reference : /TWI_6061A.pl/1.2/Fri Oct 27 11:40:48 2006//
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// CVS Reference : /TC_6082A.pl/1.7/Wed Mar 9 16:31:51 2005//
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// CVS Reference : /TC_6082A.pl/1.8/Fri Oct 17 13:27:58 2008//
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// CVS Reference : /ADC_6051C.pl/1.1/Mon Jan 31 13:12:40 2005//
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// CVS Reference : /EBI_SAM7SE512.pl/1.22/Fri Nov 18 17:47:47 2005//
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// CVS Reference : /SMC_1783A.pl/1.4/Thu Feb 3 10:30:06 2005//
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@ -337,7 +337,7 @@ typedef struct _AT91S_DBGU {
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#define DBGU_RHR (AT91_CAST(AT91_REG *) 0x00000018) // (DBGU_RHR) Receiver Holding Register
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#define DBGU_THR (AT91_CAST(AT91_REG *) 0x0000001C) // (DBGU_THR) Transmitter Holding Register
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#define DBGU_BRGR (AT91_CAST(AT91_REG *) 0x00000020) // (DBGU_BRGR) Baud Rate Generator Register
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//#define DBGU_CIDR (AT91_CAST(AT91_REG *) 0x00000040) // (DBGU_CIDR) Chip ID Register
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#define DBGU_CIDR (AT91_CAST(AT91_REG *) 0x00000040) // (DBGU_CIDR) Chip ID Register
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#define DBGU_EXID (AT91_CAST(AT91_REG *) 0x00000044) // (DBGU_EXID) Chip ID Extension Register
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#define DBGU_FNTR (AT91_CAST(AT91_REG *) 0x00000048) // (DBGU_FNTR) Force NTRST Register
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@ -1455,12 +1455,12 @@ typedef struct _AT91S_TC {
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#define AT91C_TC_CPCTRG (0x1 << 14) // (TC) RC Compare Trigger Enable
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#define AT91C_TC_WAVE (0x1 << 15) // (TC)
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#define AT91C_TC_ACPA (0x3 << 16) // (TC) RA Compare Effect on TIOA
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#define T91C_TC_ACPA_NONE (0x0 << 16) // (TC) Effect: none
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#define AT91C_TC_ACPA_NONE (0x0 << 16) // (TC) Effect: none
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#define AT91C_TC_ACPA_SET (0x1 << 16) // (TC) Effect: set
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#define AT91C_TC_ACPA_CLEAR (0x2 << 16) // (TC) Effect: clear
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#define AT91C_TC_ACPA_TOGGLE (0x3 << 16) // (TC) Effect: toggle
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#define AT91C_TC_LDRA (0x3 << 16) // (TC) RA Loading Selection
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#define T91C_TC_LDRA_NONE (0x0 << 16) // (TC) Edge: None
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#define AT91C_TC_LDRA_NONE (0x0 << 16) // (TC) Edge: None
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#define AT91C_TC_LDRA_RISING (0x1 << 16) // (TC) Edge: rising edge of TIOA
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#define AT91C_TC_LDRA_FALLING (0x2 << 16) // (TC) Edge: falling edge of TIOA
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#define AT91C_TC_LDRA_BOTH (0x3 << 16) // (TC) Edge: each edge of TIOA
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@ -1533,10 +1533,21 @@ typedef struct _AT91S_TCB {
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AT91_REG Reserved2[4]; //
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AT91_REG TCB_BCR; // TC Block Control Register
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AT91_REG TCB_BMR; // TC Block Mode Register
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AT91_REG Reserved3[9]; //
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AT91_REG TCB_ADDRSIZE; // TC ADDRSIZE REGISTER
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AT91_REG TCB_IPNAME1; // TC IPNAME1 REGISTER
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AT91_REG TCB_IPNAME2; // TC IPNAME2 REGISTER
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AT91_REG TCB_FEATURES; // TC FEATURES REGISTER
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AT91_REG TCB_VER; // Version Register
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} AT91S_TCB, *AT91PS_TCB;
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#else
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#define TCB_BCR (AT91_CAST(AT91_REG *) 0x000000C0) // (TCB_BCR) TC Block Control Register
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#define TCB_BMR (AT91_CAST(AT91_REG *) 0x000000C4) // (TCB_BMR) TC Block Mode Register
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#define TC_ADDRSIZE (AT91_CAST(AT91_REG *) 0x000000EC) // (TC_ADDRSIZE) TC ADDRSIZE REGISTER
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#define TC_IPNAME1 (AT91_CAST(AT91_REG *) 0x000000F0) // (TC_IPNAME1) TC IPNAME1 REGISTER
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#define TC_IPNAME2 (AT91_CAST(AT91_REG *) 0x000000F4) // (TC_IPNAME2) TC IPNAME2 REGISTER
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#define TC_FEATURES (AT91_CAST(AT91_REG *) 0x000000F8) // (TC_FEATURES) TC FEATURES REGISTER
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#define TC_VER (AT91_CAST(AT91_REG *) 0x000000FC) // (TC_VER) Version Register
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#endif
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// -------- TCB_BCR : (TCB Offset: 0xc0) TC Block Control Register --------
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@ -2048,8 +2059,13 @@ typedef struct _AT91S_UDP {
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#define AT91C_TC2_IER (AT91_CAST(AT91_REG *) 0xFFFA00A4) // (TC2) Interrupt Enable Register
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#define AT91C_TC2_SR (AT91_CAST(AT91_REG *) 0xFFFA00A0) // (TC2) Status Register
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// ========== Register definition for TCB peripheral ==========
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#define AT91C_TCB_ADDRSIZE (AT91_CAST(AT91_REG *) 0xFFFA00EC) // (TCB) TC ADDRSIZE REGISTER
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#define AT91C_TCB_BMR (AT91_CAST(AT91_REG *) 0xFFFA00C4) // (TCB) TC Block Mode Register
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#define AT91C_TCB_VER (AT91_CAST(AT91_REG *) 0xFFFA00FC) // (TCB) Version Register
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#define AT91C_TCB_FEATURES (AT91_CAST(AT91_REG *) 0xFFFA00F8) // (TCB) TC FEATURES REGISTER
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#define AT91C_TCB_IPNAME1 (AT91_CAST(AT91_REG *) 0xFFFA00F0) // (TCB) TC IPNAME1 REGISTER
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#define AT91C_TCB_BCR (AT91_CAST(AT91_REG *) 0xFFFA00C0) // (TCB) TC Block Control Register
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#define AT91C_TCB_IPNAME2 (AT91_CAST(AT91_REG *) 0xFFFA00F4) // (TCB) TC IPNAME2 REGISTER
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// ========== Register definition for PWMC_CH3 peripheral ==========
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#define AT91C_PWMC_CH3_CUPDR (AT91_CAST(AT91_REG *) 0xFFFCC270) // (PWMC_CH3) Channel Update Register
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#define AT91C_PWMC_CH3_Reserved (AT91_CAST(AT91_REG *) 0xFFFCC274) // (PWMC_CH3) Reserved
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