mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-21 05:43:48 -07:00
Merge pull request #2473 from douniwan5788/prune
Fixes and improve SKIP_* directives
This commit is contained in:
Iceman
GitHub
commit
42c873f49c
21 changed files with 173 additions and 115 deletions
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@ -3,6 +3,7 @@ All notable changes to this project will be documented in this file.
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This project uses the changelog in accordance with [keepchangelog](http://keepachangelog.com/). Please use this to write notable changes, which is not the same as git commit log...
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## [unreleased][unreleased]
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- Firmware size optimization, skipping unused FPGA bitstreams (@douniwan5788)
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- Added pretty Hitag S config parsing (@CiRIP)
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- Moved Hitag S operations into separate submenu: `lf hitag s` (@CiRIP)
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- Added MFC keys for Sofia public transport cards (@user890104)
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@ -20,12 +20,21 @@ PLATFORM=PM3RDV4
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#PLATFORM=PM3GENERIC
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#PLATFORM_SIZE=256
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#STANDALONE=
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#SKIP_HITAG=1
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#SKIP_FELICA=1
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#SKIP_HFPLOT=1
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#SKIP_NFCBARCODE=1
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#SKIP_ZX8211=1
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#SKIP_LF=1
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#SKIP_HITAG=1
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#SKIP_EM4x50=1
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#SKIP_EM4x70=1
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#SKIP_ZX8211=1
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#SKIP_HF=1
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#SKIP_ISO15693=1
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#SKIP_LEGICRF=1
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#SKIP_ISO14443b=1
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#SKIP_ISO14443a=1
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#SKIP_ICLASS=1
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#SKIP_FELICA=1
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#SKIP_NFCBARCODE=1
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#SKIP_HFSNIFF=1
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#SKIP_HFPLOT=1
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# To accelerate repetitive compilations:
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# Install package "ccache" -> Debian/Ubuntu: /usr/lib/ccache, Fedora/CentOS/RHEL: /usr/lib64/ccache
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@ -162,7 +162,7 @@ uint16_t SumAdc(uint8_t ch, uint8_t NbSamples) {
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a += ReadAdc(ch);
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return (a + (NbSamples >> 1) - 1);
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}
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#ifdef WITH_LF
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static void MeasureAntennaTuning(void) {
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uint32_t peak = 0;
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@ -236,7 +236,7 @@ static void MeasureAntennaTuning(void) {
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reply_ng(CMD_MEASURE_ANTENNA_TUNING, PM3_SUCCESS, (uint8_t *)&payload, sizeof(payload));
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LEDsoff();
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}
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#endif
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// Measure HF in milliVolt
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static uint16_t MeasureAntennaTuningHfData(void) {
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@ -306,7 +306,7 @@ static void SendVersion(void) {
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strncat(VersionString, "\n [ "_YELLOW_("FPGA")" ] \n ", sizeof(VersionString) - strlen(VersionString) - 1);
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for (int i = 0; i < g_fpga_bitstream_num; i++) {
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strncat(VersionString, g_fpga_version_information[i], sizeof(VersionString) - strlen(VersionString) - 1);
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strncat(VersionString, g_fpga_version_information[i].versionString, sizeof(VersionString) - strlen(VersionString) - 1);
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if (i < g_fpga_bitstream_num - 1) {
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strncat(VersionString, "\n ", sizeof(VersionString) - strlen(VersionString) - 1);
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}
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@ -1610,7 +1610,9 @@ static void PacketReceived(PacketCommandNG *packet) {
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struct p *payload = (struct p *) packet->data.asBytes;
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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FpgaSendCommand(FPGA_CMD_SET_EDGE_DETECT_THRESHOLD, (payload->threshold & 0x3f) | ((payload->threshold_high & 0x3f) << 6));
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#ifdef WITH_LEGICRF
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LegicRfSetThreshold((uint32_t)payload->legic_threshold);
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#endif
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break;
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}
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case CMD_HF_ISO14443A_SNIFF: {
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@ -2301,10 +2303,12 @@ static void PacketReceived(PacketCommandNG *packet) {
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BigBuf_free();
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break;
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}
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#ifdef WITH_LF
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case CMD_MEASURE_ANTENNA_TUNING: {
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MeasureAntennaTuning();
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break;
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}
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#endif
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case CMD_MEASURE_ANTENNA_TUNING_HF: {
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if (packet->length != 1)
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reply_ng(CMD_MEASURE_ANTENNA_TUNING_HF, PM3_EINVARG, NULL, 0);
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@ -2394,12 +2398,8 @@ static void PacketReceived(PacketCommandNG *packet) {
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Dbprintf("transfer to client failed :: | bytes between %d - %d (%d) | result: %d", i, i + len, len, result);
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}
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// Trigger a finish downloading signal with an ACK frame
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// iceman, when did sending samplingconfig array got attached here?!?
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// arg0 = status of download transfer
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// arg1 = RFU
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// arg2 = tracelen?
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// asbytes = samplingconfig array
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reply_mix(CMD_ACK, 1, 0, BigBuf_get_traceLen(), getSamplingConfig(), sizeof(sample_config));
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reply_mix(CMD_ACK, 1, 0, 0, 0, 0);
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LED_B_OFF();
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break;
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}
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@ -2818,11 +2818,13 @@ static void PacketReceived(PacketCommandNG *packet) {
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break;
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}
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#endif
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#ifdef WITH_LF
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case CMD_LF_SET_DIVISOR: {
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, packet->data.asBytes[0]);
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break;
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}
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#endif
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case CMD_SET_ADC_MUX: {
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switch (packet->data.asBytes[0]) {
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case 0:
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@ -377,7 +377,7 @@ static int bruteforce(const uint8_t address, const uint8_t *rnd, const uint8_t *
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uint8_t rev_rnd[7];
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uint8_t temp_rnd[7];
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reverse_arraycopy((uint8_t *)rnd, rev_rnd, sizeof(rev_rnd));
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reverse_arraybytes_copy((uint8_t *)rnd, rev_rnd, sizeof(rev_rnd));
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memcpy(temp_rnd, rnd, sizeof(temp_rnd));
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for (int k = start_key; k <= 0xFFFF; ++k) {
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@ -39,7 +39,7 @@ typedef struct {
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typedef lz4_stream_t *lz4_streamp_t;
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// remember which version of the bitstream we have already downloaded to the FPGA
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static int downloaded_bitstream = 0;
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static int downloaded_bitstream = FPGA_BITSTREAM_UNKNOWN;
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// this is where the bitstreams are located in memory:
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extern uint32_t _binary_obj_fpga_all_bit_z_start[], _binary_obj_fpga_all_bit_z_end[];
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@ -221,14 +221,31 @@ static int get_from_fpga_combined_stream(lz4_streamp_t compressed_fpga_stream, u
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return *fpga_image_ptr++;
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}
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static int bitstream_target_to_index(FPGA_config bitstream_target) {
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static int8_t bitstream_index_map[FPGA_BITSTREAM_MAX] = {-1};
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// Initialize
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if (bitstream_index_map[0] == -1){
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bitstream_index_map[0] = 0;
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for (size_t i = 0; i < g_fpga_bitstream_num; i++) {
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FPGA_VERSION_INFORMATION info = g_fpga_version_information[i];
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bitstream_index_map[info.target_config] = i;
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}
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}
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return bitstream_index_map[bitstream_target];
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}
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//----------------------------------------------------------------------------
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// Undo the interleaving of several FPGA config files. FPGA config files
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// are combined into one big file:
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// 288 bytes from FPGA file 1, followed by 288 bytes from FGPA file 2, etc.
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//----------------------------------------------------------------------------
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static int get_from_fpga_stream(int bitstream_version, lz4_streamp_t compressed_fpga_stream, uint8_t *output_buffer) {
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while ((uncompressed_bytes_cnt / FPGA_INTERLEAVE_SIZE) % g_fpga_bitstream_num != (bitstream_version - 1)) {
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// skip undesired data belonging to other bitstream_versions
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static int get_from_fpga_stream(int bitstream_target, lz4_streamp_t compressed_fpga_stream, uint8_t *output_buffer) {
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int bitstream_index = bitstream_target_to_index(bitstream_target);
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while ((uncompressed_bytes_cnt / FPGA_INTERLEAVE_SIZE) % g_fpga_bitstream_num != bitstream_index) {
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// skip undesired data belonging to other bitstream_targets
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get_from_fpga_combined_stream(compressed_fpga_stream, output_buffer);
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}
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@ -238,7 +255,7 @@ static int get_from_fpga_stream(int bitstream_version, lz4_streamp_t compressed_
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//----------------------------------------------------------------------------
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// Initialize decompression of the respective (HF or LF) FPGA stream
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//----------------------------------------------------------------------------
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static bool reset_fpga_stream(int bitstream_version, lz4_streamp_t compressed_fpga_stream, uint8_t *output_buffer) {
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static bool reset_fpga_stream(int bitstream_target, lz4_streamp_t compressed_fpga_stream, uint8_t *output_buffer) {
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uint8_t header[FPGA_BITSTREAM_FIXED_HEADER_SIZE];
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uncompressed_bytes_cnt = 0;
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@ -254,7 +271,7 @@ static bool reset_fpga_stream(int bitstream_version, lz4_streamp_t compressed_fp
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fpga_image_ptr = output_buffer + FPGA_RING_BUFFER_BYTES;
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for (uint16_t i = 0; i < FPGA_BITSTREAM_FIXED_HEADER_SIZE; i++)
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header[i] = get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer);
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header[i] = get_from_fpga_stream(bitstream_target, compressed_fpga_stream, output_buffer);
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// Check for a valid .bit file (starts with bitparse_fixed_header)
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if (memcmp(bitparse_fixed_header, header, FPGA_BITSTREAM_FIXED_HEADER_SIZE) == 0)
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@ -276,7 +293,7 @@ static void DownloadFPGA_byte(uint8_t w) {
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}
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// Download the fpga image starting at current stream position with length FpgaImageLen bytes
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static void DownloadFPGA(int bitstream_version, int FpgaImageLen, lz4_streamp_t compressed_fpga_stream, uint8_t *output_buffer) {
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static void DownloadFPGA(int bitstream_target, int FpgaImageLen, lz4_streamp_t compressed_fpga_stream, uint8_t *output_buffer) {
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int i = 0;
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#if !defined XC3
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AT91C_BASE_PIOA->PIO_OER = GPIO_FPGA_ON;
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@ -354,7 +371,7 @@ static void DownloadFPGA(int bitstream_version, int FpgaImageLen, lz4_streamp_t
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#endif
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for (i = 0; i < FpgaImageLen; i++) {
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int b = get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer);
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int b = get_from_fpga_stream(bitstream_target, compressed_fpga_stream, output_buffer);
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if (b < 0) {
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Dbprintf("Error %d during FpgaDownload", b);
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break;
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@ -383,14 +400,14 @@ static void DownloadFPGA(int bitstream_version, int FpgaImageLen, lz4_streamp_t
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* (big endian), <length> bytes content. Except for section 'e' which has 4 bytes
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* length.
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*/
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static int bitparse_find_section(int bitstream_version, char section_name, uint32_t *section_length, lz4_streamp_t compressed_fpga_stream, uint8_t *output_buffer) {
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static int bitparse_find_section(int bitstream_target, char section_name, uint32_t *section_length, lz4_streamp_t compressed_fpga_stream, uint8_t *output_buffer) {
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#define MAX_FPGA_BIT_STREAM_HEADER_SEARCH 100 // maximum number of bytes to search for the requested section
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int result = 0;
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uint16_t numbytes = 0;
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while (numbytes < MAX_FPGA_BIT_STREAM_HEADER_SEARCH) {
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char current_name = get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer);
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char current_name = get_from_fpga_stream(bitstream_target, compressed_fpga_stream, output_buffer);
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numbytes++;
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uint32_t current_length = 0;
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if (current_name < 'a' || current_name > 'e') {
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@ -401,10 +418,10 @@ static int bitparse_find_section(int bitstream_version, char section_name, uint3
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switch (current_name) {
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case 'e':
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/* Four byte length field */
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current_length += get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer) << 24;
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current_length += get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer) << 16;
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current_length += get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer) << 8;
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current_length += get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer) << 0;
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current_length += get_from_fpga_stream(bitstream_target, compressed_fpga_stream, output_buffer) << 24;
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current_length += get_from_fpga_stream(bitstream_target, compressed_fpga_stream, output_buffer) << 16;
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current_length += get_from_fpga_stream(bitstream_target, compressed_fpga_stream, output_buffer) << 8;
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current_length += get_from_fpga_stream(bitstream_target, compressed_fpga_stream, output_buffer) << 0;
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numbytes += 4;
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if (current_length > 300 * 1024) {
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/* section e should never exceed about 300KB, if the length is too big limit it but still send the bitstream just in case */
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@ -412,8 +429,8 @@ static int bitparse_find_section(int bitstream_version, char section_name, uint3
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}
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break;
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default: /* Two byte length field */
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current_length += get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer) << 8;
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current_length += get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer) << 0;
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current_length += get_from_fpga_stream(bitstream_target, compressed_fpga_stream, output_buffer) << 8;
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current_length += get_from_fpga_stream(bitstream_target, compressed_fpga_stream, output_buffer) << 0;
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numbytes += 2;
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if (current_length > 64) {
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/* if text field is too long, keep it but truncate it */
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@ -429,7 +446,7 @@ static int bitparse_find_section(int bitstream_version, char section_name, uint3
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}
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for (uint32_t i = 0; i < current_length && numbytes < MAX_FPGA_BIT_STREAM_HEADER_SEARCH; i++) {
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get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer);
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get_from_fpga_stream(bitstream_target, compressed_fpga_stream, output_buffer);
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numbytes++;
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}
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}
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@ -438,16 +455,16 @@ static int bitparse_find_section(int bitstream_version, char section_name, uint3
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//----------------------------------------------------------------------------
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// Change FPGA image status, if image loaded.
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// bitstream_version is your new fpga image version
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// bitstream_target is your new fpga image version
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// return true if can change.
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// return false if image is unloaded.
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//----------------------------------------------------------------------------
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#if defined XC3
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static bool FpgaConfCurrentMode(int bitstream_version) {
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static bool FpgaConfCurrentMode(int bitstream_target) {
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// fpga "XC3S100E" image merge
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// If fpga image is no init
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// We need load hf_lf_allinone.bit
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if (downloaded_bitstream != 0) {
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if (downloaded_bitstream != FPGA_BITSTREAM_UNKNOWN) {
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// test start
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// PIO controls the following pins
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AT91C_BASE_PIOA->PIO_PER = GPIO_FPGA_SWITCH;
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@ -457,13 +474,13 @@ static bool FpgaConfCurrentMode(int bitstream_version) {
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// try to turn off antenna
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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if (bitstream_version == FPGA_BITSTREAM_LF) {
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if (bitstream_target == FPGA_BITSTREAM_LF) {
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LOW(GPIO_FPGA_SWITCH);
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} else {
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HIGH(GPIO_FPGA_SWITCH);
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}
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// update downloaded_bitstream
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downloaded_bitstream = bitstream_version;
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downloaded_bitstream = bitstream_target;
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// turn off antenna
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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return true;
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@ -476,10 +493,10 @@ static bool FpgaConfCurrentMode(int bitstream_version) {
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// Check which FPGA image is currently loaded (if any). If necessary
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// decompress and load the correct (HF or LF) image to the FPGA
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//----------------------------------------------------------------------------
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void FpgaDownloadAndGo(int bitstream_version) {
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void FpgaDownloadAndGo(int bitstream_target) {
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// check whether or not the bitstream is already loaded
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if (downloaded_bitstream == bitstream_version) {
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if (downloaded_bitstream == bitstream_target) {
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FpgaEnableTracing();
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return;
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}
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@ -487,7 +504,7 @@ void FpgaDownloadAndGo(int bitstream_version) {
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#if defined XC3
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// If we can change image version
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// direct return.
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if (FpgaConfCurrentMode(bitstream_version)) {
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if (FpgaConfCurrentMode(bitstream_target)) {
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return;
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}
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#endif
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@ -506,19 +523,19 @@ void FpgaDownloadAndGo(int bitstream_version) {
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compressed_fpga_stream.lz4StreamDecode = &lz4StreamDecode_body;
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uint8_t *output_buffer = BigBuf_malloc(FPGA_RING_BUFFER_BYTES);
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if (!reset_fpga_stream(bitstream_version, &compressed_fpga_stream, output_buffer))
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if (!reset_fpga_stream(bitstream_target, &compressed_fpga_stream, output_buffer))
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return;
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uint32_t bitstream_length;
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if (bitparse_find_section(bitstream_version, 'e', &bitstream_length, &compressed_fpga_stream, output_buffer)) {
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DownloadFPGA(bitstream_version, bitstream_length, &compressed_fpga_stream, output_buffer);
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downloaded_bitstream = bitstream_version;
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if (bitparse_find_section(bitstream_target, 'e', &bitstream_length, &compressed_fpga_stream, output_buffer)) {
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DownloadFPGA(bitstream_target, bitstream_length, &compressed_fpga_stream, output_buffer);
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downloaded_bitstream = bitstream_target;
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}
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#if defined XC3
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// first download fpga image to hf
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// we need to change fpga status to hf
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FpgaConfCurrentMode(bitstream_version);
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FpgaConfCurrentMode(bitstream_target);
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#endif
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// turn off antenna
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@ -603,7 +620,7 @@ void SetAdcMuxFor(uint32_t whichGpio) {
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void Fpga_print_status(void) {
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DbpString(_CYAN_("Current FPGA image"));
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Dbprintf(" mode....................%s", g_fpga_version_information[downloaded_bitstream - 1]);
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Dbprintf(" mode.................... %s", g_fpga_version_information[bitstream_target_to_index(downloaded_bitstream)]);
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}
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int FpgaGetCurrent(void) {
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|
|
|
|||
|
|
@ -20,6 +20,7 @@
|
|||
#define __FPGALOADER_H
|
||||
|
||||
#include "common.h"
|
||||
#include "fpga.h"
|
||||
|
||||
#define FpgaDisableSscDma(void) AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
|
||||
#define FpgaEnableSscDma(void) AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTEN;
|
||||
|
|
@ -164,8 +165,8 @@ void FpgaSendCommand(uint16_t cmd, uint16_t v);
|
|||
void FpgaWriteConfWord(uint16_t v);
|
||||
void FpgaEnableTracing(void);
|
||||
void FpgaDisableTracing(void);
|
||||
void FpgaDownloadAndGo(int bitstream_version);
|
||||
// void FpgaGatherVersion(int bitstream_version, char *dst, int len);
|
||||
void FpgaDownloadAndGo(int bitstream_target);
|
||||
// void FpgaGatherVersion(int bitstream_target, char *dst, int len);
|
||||
void FpgaSetupSsc(uint16_t fpga_mode);
|
||||
void SetupSpi(int mode);
|
||||
bool FpgaSetupSscDma(uint8_t *buf, uint16_t len);
|
||||
|
|
|
|||
|
|
@ -114,24 +114,3 @@ uint64_t x_bytes_to_num(uint8_t *src, size_t len) {
|
|||
return num;
|
||||
}
|
||||
|
||||
uint8_t reversebyte(uint8_t b) {
|
||||
b = (b & 0xF0) >> 4 | (b & 0x0F) << 4;
|
||||
b = (b & 0xCC) >> 2 | (b & 0x33) << 2;
|
||||
b = (b & 0xAA) >> 1 | (b & 0x55) << 1;
|
||||
return b;
|
||||
}
|
||||
|
||||
void reverse_arraybytes(uint8_t *arr, size_t len) {
|
||||
size_t i;
|
||||
for (i = 0; i < len ; i++) {
|
||||
arr[i] = reversebyte(arr[i]);
|
||||
}
|
||||
}
|
||||
|
||||
void reverse_arraycopy(uint8_t *arr, uint8_t *dest, size_t len) {
|
||||
size_t i;
|
||||
for (i = 0; i < len ; i++) {
|
||||
dest[i] = reversebyte(arr[i]);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -57,7 +57,4 @@ int bitsLeft(BitstreamIn_t *stream);
|
|||
void push6bits(BitstreamOut_t *stream, uint8_t bits);
|
||||
void x_num_to_bytes(uint64_t n, size_t len, uint8_t *dest);
|
||||
uint64_t x_bytes_to_num(uint8_t *src, size_t len);
|
||||
uint8_t reversebyte(uint8_t b);
|
||||
void reverse_arraybytes(uint8_t *arr, size_t len);
|
||||
void reverse_arraycopy(uint8_t *arr, uint8_t *dest, size_t len);
|
||||
#endif // CIPHERUTILS_H
|
||||
|
|
|
|||
|
|
@ -44,6 +44,7 @@
|
|||
#include "preferences.h"
|
||||
#include "mifare/gen4.h"
|
||||
#include "generator.h" // keygens.
|
||||
#include "fpga.h"
|
||||
|
||||
static int CmdHelp(const char *Cmd);
|
||||
|
||||
|
|
|
|||
|
|
@ -1468,12 +1468,12 @@ static command_t CommandTable[] = {
|
|||
{"ping", CmdPing, IfPm3Present, "Test if the Proxmark3 is responsive"},
|
||||
{"readmem", CmdReadmem, IfPm3Present, "Read from MCU flash"},
|
||||
{"reset", CmdReset, IfPm3Present, "Reset the device"},
|
||||
{"setlfdivisor", CmdSetDivisor, IfPm3Present, "Drive LF antenna at 12MHz / (divisor + 1)"},
|
||||
{"sethfthresh", CmdSetHFThreshold, IfPm3Present, "Set thresholds in HF/14a mode"},
|
||||
{"setlfdivisor", CmdSetDivisor, IfPm3Lf, "Drive LF antenna at 12MHz / (divisor + 1)"},
|
||||
{"sethfthresh", CmdSetHFThreshold, IfPm3Iso14443a, "Set thresholds in HF/14a mode"},
|
||||
{"setmux", CmdSetMux, IfPm3Present, "Set the ADC mux to a specific value"},
|
||||
{"standalone", CmdStandalone, IfPm3Present, "Start installed standalone mode on device"},
|
||||
{"tia", CmdTia, IfPm3Present, "Trigger a Timing Interval Acquisition to re-adjust the RealTimeCounter divider"},
|
||||
{"tune", CmdTune, IfPm3Present, "Measure tuning of device antenna"},
|
||||
{"tune", CmdTune, IfPm3Lf, "Measure tuning of device antenna"},
|
||||
{NULL, NULL, NULL, NULL}
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@
|
|||
#include "cmdhw.h" // for setting FPGA image
|
||||
#include "cmdlfawid.h" // for awid menu
|
||||
#include "cmdlfem.h" // for em menu
|
||||
#include "cmdlfem410x.h" // for em4x menu
|
||||
#include "cmdlfem410x.h" // for em4x menu
|
||||
#include "cmdlfem4x05.h" // for em4x05 / 4x69
|
||||
#include "cmdlfem4x50.h" // for em4x50
|
||||
#include "cmdlfem4x70.h" // for em4x70
|
||||
|
|
@ -67,6 +67,7 @@
|
|||
#include "cmdlfzx8211.h" // for ZX8211 menu
|
||||
#include "crc.h"
|
||||
#include "pm3_cmd.h" // for LF_CMDREAD_MAX_EXTRA_SYMBOLS
|
||||
#include "fpga.h" // for set_fpga_mode
|
||||
|
||||
static int CmdHelp(const char *Cmd);
|
||||
|
||||
|
|
@ -1552,7 +1553,7 @@ static bool check_chiptype(bool getDeviceData) {
|
|||
|
||||
//check for em4x05/em4x69 chips first
|
||||
uint32_t word = 0;
|
||||
if (em4x05_isblock0(&word)) {
|
||||
if (IfPm3EM4x50() && em4x05_isblock0(&word)) {
|
||||
PrintAndLogEx(SUCCESS, "Chipset detection: " _GREEN_("EM4x05 / EM4x69"));
|
||||
PrintAndLogEx(HINT, "Hint: try " _YELLOW_("`lf em 4x05`") " commands");
|
||||
retval = true;
|
||||
|
|
@ -1569,7 +1570,7 @@ static bool check_chiptype(bool getDeviceData) {
|
|||
|
||||
#if !defined ICOPYX
|
||||
// check for em4x50 chips
|
||||
if (detect_4x50_block()) {
|
||||
if (IfPm3EM4x50() && detect_4x50_block()) {
|
||||
PrintAndLogEx(SUCCESS, "Chipset detection: " _GREEN_("EM4x50"));
|
||||
PrintAndLogEx(HINT, "Hint: try " _YELLOW_("`lf em 4x50`") " commands");
|
||||
retval = true;
|
||||
|
|
@ -1577,7 +1578,7 @@ static bool check_chiptype(bool getDeviceData) {
|
|||
}
|
||||
|
||||
// check for em4x70 chips
|
||||
if (detect_4x70_block()) {
|
||||
if (IfPm3EM4x70() && detect_4x70_block()) {
|
||||
PrintAndLogEx(SUCCESS, "Chipset detection: " _GREEN_("EM4x70"));
|
||||
PrintAndLogEx(HINT, "Hint: try " _YELLOW_("`lf em 4x70`") " commands");
|
||||
retval = true;
|
||||
|
|
|
|||
|
|
@ -34,6 +34,7 @@
|
|||
|
||||
#include "cipher.h"
|
||||
#include "cipherutils.h"
|
||||
#include "commonutil.h"
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <stdbool.h>
|
||||
|
|
|
|||
|
|
@ -125,18 +125,6 @@ uint64_t x_bytes_to_num(uint8_t *src, size_t len) {
|
|||
return num;
|
||||
}
|
||||
|
||||
void reverse_arraybytes(uint8_t *arr, size_t len) {
|
||||
for (size_t i = 0; i < len ; i++) {
|
||||
arr[i] = reflect8(arr[i]);
|
||||
}
|
||||
}
|
||||
|
||||
void reverse_arraycopy(uint8_t *arr, uint8_t *dest, size_t len) {
|
||||
for (size_t i = 0; i < len ; i++) {
|
||||
dest[i] = reflect8(arr[i]);
|
||||
}
|
||||
}
|
||||
|
||||
void printarr(const char *name, uint8_t *arr, int len) {
|
||||
if (name == NULL || arr == NULL) return;
|
||||
|
||||
|
|
|
|||
|
|
@ -62,9 +62,6 @@ int testCipherUtils(void);
|
|||
void push6bits(BitstreamOut_t *stream, uint8_t bits);
|
||||
void x_num_to_bytes(uint64_t n, size_t len, uint8_t *dest);
|
||||
uint64_t x_bytes_to_num(uint8_t *src, size_t len);
|
||||
uint8_t reversebyte(uint8_t b);
|
||||
void reverse_arraybytes(uint8_t *arr, size_t len);
|
||||
void reverse_arraycopy(uint8_t *arr, uint8_t *dest, size_t len);
|
||||
void printarr(const char *name, uint8_t *arr, int len);
|
||||
void printarr_human_readable(const char *title, uint8_t *arr, int len);
|
||||
#endif // CIPHERUTILS_H
|
||||
|
|
|
|||
|
|
@ -549,3 +549,17 @@ bool hexstr_to_byte_array(const char *hexstr, uint8_t *d, size_t *n) {
|
|||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
void reverse_arraybytes(uint8_t *arr, size_t len) {
|
||||
size_t i;
|
||||
for (i = 0; i < len ; i++) {
|
||||
arr[i] = reflect8(arr[i]);
|
||||
}
|
||||
}
|
||||
|
||||
void reverse_arraybytes_copy(uint8_t *arr, uint8_t *dest, size_t len) {
|
||||
size_t i;
|
||||
for (i = 0; i < len ; i++) {
|
||||
dest[i] = reflect8(arr[i]);
|
||||
}
|
||||
}
|
||||
|
|
@ -130,4 +130,7 @@ void reverse_array(uint8_t *d, size_t n);
|
|||
void reverse_array_copy(const uint8_t *src, int src_len, uint8_t *dest);
|
||||
|
||||
bool hexstr_to_byte_array(const char *hexstr, uint8_t *d, size_t *n);
|
||||
|
||||
void reverse_arraybytes(uint8_t *arr, size_t len);
|
||||
void reverse_arraybytes_copy(uint8_t *arr, uint8_t *dest, size_t len);
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -73,6 +73,7 @@ and you can specify which parts to skip in order to reduce the size:
|
|||
SKIP_LF=1
|
||||
SKIP_HITAG=1
|
||||
SKIP_EM4x50=1
|
||||
SKIP_EM4x70=1
|
||||
SKIP_ISO15693=1
|
||||
SKIP_LEGICRF=1
|
||||
SKIP_ISO14443b=1
|
||||
|
|
@ -96,32 +97,59 @@ PLTNAME = Unknown Platform
|
|||
PLATFORM_FPGA = fpga-undefined
|
||||
|
||||
ifeq ($(PLATFORM),PM3RDV4)
|
||||
# FPGA bitstream files, the order matters!
|
||||
FPGA_BITSTREAMS = fpga_pm3_lf.bit fpga_pm3_hf.bit fpga_pm3_felica.bit fpga_pm3_hf_15.bit
|
||||
# FPGA bitstream files, the order doesn't matter anymore
|
||||
FPGA_BITSTREAMS = fpga_pm3_hf.bit
|
||||
ifneq ($(SKIP_LF),1)
|
||||
FPGA_BITSTREAMS += fpga_pm3_lf.bit
|
||||
endif
|
||||
ifneq ($(SKIP_FELICA),1)
|
||||
FPGA_BITSTREAMS += fpga_pm3_felica.bit
|
||||
endif
|
||||
ifneq ($(SKIP_ISO15693),1)
|
||||
FPGA_BITSTREAMS += fpga_pm3_hf_15.bit
|
||||
endif
|
||||
PLATFORM_DEFS = -DWITH_SMARTCARD -DWITH_FLASH -DRDV4
|
||||
PLTNAME = Proxmark3 RDV4
|
||||
PLATFORM_FPGA = xc2s30
|
||||
RDV4 = yes
|
||||
else ifeq ($(PLATFORM),PM3OTHER)
|
||||
$(warning PLATFORM=PM3OTHER is deprecated, please use PLATFORM=PM3GENERIC)
|
||||
# FPGA bitstream files, the order matters!
|
||||
FPGA_BITSTREAMS = fpga_pm3_lf.bit fpga_pm3_hf.bit fpga_pm3_felica.bit fpga_pm3_hf_15.bit
|
||||
# FPGA bitstream files, the order doesn't matter anymore
|
||||
FPGA_BITSTREAMS = fpga_pm3_hf.bit
|
||||
ifneq ($(SKIP_LF),1)
|
||||
FPGA_BITSTREAMS += fpga_pm3_lf.bit
|
||||
endif
|
||||
ifneq ($(SKIP_FELICA),1)
|
||||
FPGA_BITSTREAMS += fpga_pm3_felica.bit
|
||||
endif
|
||||
ifneq ($(SKIP_ISO15693),1)
|
||||
FPGA_BITSTREAMS += fpga_pm3_hf_15.bit
|
||||
endif
|
||||
PLTNAME = Proxmark3 generic target
|
||||
PLATFORM_FPGA = xc2s30
|
||||
ifeq ($(LED_ORDER),PM3EASY)
|
||||
PLATFORM_DEFS = -DLED_ORDER_PM3EASY
|
||||
endif
|
||||
else ifeq ($(PLATFORM),PM3GENERIC)
|
||||
# FPGA bitstream files, the order matters!
|
||||
FPGA_BITSTREAMS = fpga_pm3_lf.bit fpga_pm3_hf.bit fpga_pm3_felica.bit fpga_pm3_hf_15.bit
|
||||
# FPGA bitstream files, the order doesn't matter anymore
|
||||
FPGA_BITSTREAMS = fpga_pm3_hf.bit
|
||||
ifneq ($(SKIP_LF),1)
|
||||
FPGA_BITSTREAMS += fpga_pm3_lf.bit
|
||||
endif
|
||||
ifneq ($(SKIP_FELICA),1)
|
||||
FPGA_BITSTREAMS += fpga_pm3_felica.bit
|
||||
endif
|
||||
ifneq ($(SKIP_ISO15693),1)
|
||||
FPGA_BITSTREAMS += fpga_pm3_hf_15.bit
|
||||
endif
|
||||
PLTNAME = Proxmark3 generic target
|
||||
PLATFORM_FPGA = xc2s30
|
||||
ifeq ($(LED_ORDER),PM3EASY)
|
||||
PLATFORM_DEFS = -DLED_ORDER_PM3EASY
|
||||
endif
|
||||
else ifeq ($(PLATFORM),PM3ICOPYX)
|
||||
# FPGA bitstream files, the order matters - only hf has a bitstream, the other 3 files are 0 bytes
|
||||
FPGA_BITSTREAMS = fpga_icopyx_lf.bit fpga_icopyx_hf.bit fpga_icopyx_felica.bit fpga_icopyx_hf_15.bit
|
||||
# FPGA bitstream files, the order doesn't matter anymore - only hf has a bitstream
|
||||
FPGA_BITSTREAMS = fpga_icopyx_hf.bit
|
||||
PLATFORM_DEFS = -DWITH_FLASH -DICOPYX -DXC3
|
||||
PLTNAME = iCopy-X with XC3S100E
|
||||
PLATFORM_FPGA = xc3s100e
|
||||
|
|
|
|||
|
|
@ -32,8 +32,25 @@
|
|||
#define FPGA_RING_BUFFER_BYTES (1024 * 30)
|
||||
#define FPGA_TRACE_SIZE 3072
|
||||
|
||||
// definitions for multiple FPGA config files support
|
||||
typedef enum
|
||||
{
|
||||
FPGA_BITSTREAM_UNKNOWN = 0,
|
||||
FPGA_BITSTREAM_LF = 1,
|
||||
FPGA_BITSTREAM_HF,
|
||||
FPGA_BITSTREAM_HF_FELICA,
|
||||
FPGA_BITSTREAM_HF_15,
|
||||
FPGA_BITSTREAM_MAX = FPGA_BITSTREAM_HF_15,
|
||||
} FPGA_config;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
const char *const versionString;
|
||||
const FPGA_config target_config;
|
||||
} FPGA_VERSION_INFORMATION;
|
||||
|
||||
static const uint8_t bitparse_fixed_header[] = {0x00, 0x09, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x00, 0x00, 0x01};
|
||||
extern const int g_fpga_bitstream_num;
|
||||
extern const char *const g_fpga_version_information[];
|
||||
extern const FPGA_VERSION_INFORMATION g_fpga_version_information[];
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -182,12 +182,6 @@ work:
|
|||
$(Q)$(XILINX_TOOLS_PREFIX)par $(VERBOSITY) -w $< $@
|
||||
|
||||
%.bit: %.ncd
|
||||
# Hacky hack, make empty files for icopyx
|
||||
if echo "$@" | grep -qi "icopyx"; then \
|
||||
truncate -s0 ../fpga_icopyx_lf.bit; \
|
||||
truncate -s0 ../fpga_icopyx_hf_15.bit; \
|
||||
truncate -s0 ../fpga_icopyx_felica.bit; \
|
||||
fi
|
||||
$(Q)$(RM) $@ $*.drc $*.rbt
|
||||
$(info [=] BITGEN $@)
|
||||
$(Q)$(XILINX_TOOLS_PREFIX)bitgen $(VERBOSITY) -w $* $@
|
||||
|
|
|
|||
|
|
@ -891,11 +891,6 @@ typedef struct {
|
|||
# define UART_TCP_LOCAL_CLIENT_RX_TIMEOUT_MS 40
|
||||
# define UART_UDP_LOCAL_CLIENT_RX_TIMEOUT_MS 20
|
||||
|
||||
// definitions for multiple FPGA config files support
|
||||
#define FPGA_BITSTREAM_LF 1
|
||||
#define FPGA_BITSTREAM_HF 2
|
||||
#define FPGA_BITSTREAM_HF_FELICA 3
|
||||
#define FPGA_BITSTREAM_HF_15 4
|
||||
|
||||
// CMD_DEVICE_INFO response packet has flags in arg[0], flag definitions:
|
||||
/* Whether a bootloader that understands the g_common_area is present */
|
||||
|
|
|
|||
|
|
@ -420,8 +420,9 @@ static void print_version_info_preamble(FILE *outfile, int num_infiles) {
|
|||
fprintf(outfile, "// This file is generated by fpga_compress. Don't edit!\n");
|
||||
fprintf(outfile, "//-----------------------------------------------------------------------------\n");
|
||||
fprintf(outfile, "\n\n");
|
||||
fprintf(outfile, "#include \"fpga.h\"\n\n");
|
||||
fprintf(outfile, "const int g_fpga_bitstream_num = %d;\n", num_infiles);
|
||||
fprintf(outfile, "const char *const g_fpga_version_information[%d] = {\n", num_infiles);
|
||||
fprintf(outfile, "const FPGA_VERSION_INFORMATION g_fpga_version_information[%d] = {\n", num_infiles);
|
||||
}
|
||||
|
||||
static int generate_fpga_version_info(FILE *infile[], char *infile_names[], int num_infiles, FILE *outfile) {
|
||||
|
|
@ -432,7 +433,19 @@ static int generate_fpga_version_info(FILE *infile[], char *infile_names[], int
|
|||
|
||||
for (int i = 0; i < num_infiles; i++) {
|
||||
FpgaGatherVersion(infile[i], infile_names[i], version_string, sizeof(version_string));
|
||||
fprintf(outfile, " \" %s\"", version_string);
|
||||
fprintf(outfile, " { \"%s\"", version_string);
|
||||
|
||||
if (!memcmp("fpga_pm3_lf.ncd", version_string, sizeof("fpga_pm3_lf.ncd") - 1))
|
||||
fprintf(outfile, ", FPGA_BITSTREAM_LF }");
|
||||
else if (!memcmp("fpga_pm3_hf_15.ncd", version_string, sizeof("fpga_pm3_hf_15.ncd") - 1))
|
||||
fprintf(outfile, ", FPGA_BITSTREAM_HF_15 }");
|
||||
else if (!memcmp("fpga_pm3_hf.ncd", version_string, sizeof("fpga_pm3_hf.ncd") - 1))
|
||||
fprintf(outfile, ", FPGA_BITSTREAM_HF }");
|
||||
else if (!memcmp("fpga_pm3_felica.ncd", version_string, sizeof("fpga_pm3_felica.ncd") - 1))
|
||||
fprintf(outfile, ", FPGA_BITSTREAM_HF_FELICA }");
|
||||
else
|
||||
fprintf(outfile, ", FPGA_BITSTREAM_UNKNOWN }");
|
||||
|
||||
if (i != num_infiles - 1) {
|
||||
fprintf(outfile, ",");
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue