mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-19 21:03:48 -07:00
feature: Make the FPGA bitstreams working with SKIP_* define.
Now, you can enable at least two of your favorite technologies (such as LF and HF 14443A) attached a standalone mode and still have spare ROM space for other functionalities on a Proxmark3 Easy with a 256KiB ROM.
This commit is contained in:
parent
8928883f2d
commit
413a17a7a6
5 changed files with 74 additions and 14 deletions
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@ -306,7 +306,7 @@ static void SendVersion(void) {
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strncat(VersionString, "\n [ "_YELLOW_("FPGA")" ] \n ", sizeof(VersionString) - strlen(VersionString) - 1);
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strncat(VersionString, "\n [ "_YELLOW_("FPGA")" ] \n ", sizeof(VersionString) - strlen(VersionString) - 1);
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for (int i = 0; i < g_fpga_bitstream_num; i++) {
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for (int i = 0; i < g_fpga_bitstream_num; i++) {
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strncat(VersionString, g_fpga_version_information[i], sizeof(VersionString) - strlen(VersionString) - 1);
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strncat(VersionString, g_fpga_version_information[i].versionString, sizeof(VersionString) - strlen(VersionString) - 1);
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if (i < g_fpga_bitstream_num - 1) {
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if (i < g_fpga_bitstream_num - 1) {
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strncat(VersionString, "\n ", sizeof(VersionString) - strlen(VersionString) - 1);
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strncat(VersionString, "\n ", sizeof(VersionString) - strlen(VersionString) - 1);
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}
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}
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@ -221,14 +221,28 @@ static int get_from_fpga_combined_stream(lz4_streamp_t compressed_fpga_stream, u
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return *fpga_image_ptr++;
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return *fpga_image_ptr++;
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}
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}
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static int bitstream_version_to_index(FPGA_config bitstream_version) {
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static int8_t bitstream_index_map[FPGA_BITSTREAM_MAX] = {-1};
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// Initialize
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if (bitstream_index_map[0] == -1){
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for (size_t i = 0; i < g_fpga_bitstream_num; i++) {
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FPGA_VERSION_INFORMATION info = g_fpga_version_information[i];
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bitstream_index_map[info.target_config] = i;
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}
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}
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return bitstream_index_map[bitstream_version];
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}
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// Undo the interleaving of several FPGA config files. FPGA config files
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// Undo the interleaving of several FPGA config files. FPGA config files
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// are combined into one big file:
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// are combined into one big file:
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// 288 bytes from FPGA file 1, followed by 288 bytes from FGPA file 2, etc.
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// 288 bytes from FPGA file 1, followed by 288 bytes from FGPA file 2, etc.
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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static int get_from_fpga_stream(int bitstream_version, lz4_streamp_t compressed_fpga_stream, uint8_t *output_buffer) {
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static int get_from_fpga_stream(int bitstream_version, lz4_streamp_t compressed_fpga_stream, uint8_t *output_buffer) {
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while ((uncompressed_bytes_cnt / FPGA_INTERLEAVE_SIZE) % g_fpga_bitstream_num != (bitstream_version - 1)) {
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int bitstream_index = bitstream_version_to_index(bitstream_version);
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// skip undesired data belonging to other bitstream_versions
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while ((uncompressed_bytes_cnt / FPGA_INTERLEAVE_SIZE) % g_fpga_bitstream_num != bitstream_index) {
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get_from_fpga_combined_stream(compressed_fpga_stream, output_buffer);
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get_from_fpga_combined_stream(compressed_fpga_stream, output_buffer);
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}
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}
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@ -603,7 +617,7 @@ void SetAdcMuxFor(uint32_t whichGpio) {
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void Fpga_print_status(void) {
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void Fpga_print_status(void) {
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DbpString(_CYAN_("Current FPGA image"));
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DbpString(_CYAN_("Current FPGA image"));
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Dbprintf(" mode....................%s", g_fpga_version_information[downloaded_bitstream - 1]);
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Dbprintf(" mode.................... %s", g_fpga_version_information[downloaded_bitstream - 1]);
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}
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}
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int FpgaGetCurrent(void) {
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int FpgaGetCurrent(void) {
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@ -97,31 +97,58 @@ PLTNAME = Unknown Platform
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PLATFORM_FPGA = fpga-undefined
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PLATFORM_FPGA = fpga-undefined
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ifeq ($(PLATFORM),PM3RDV4)
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ifeq ($(PLATFORM),PM3RDV4)
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# FPGA bitstream files, the order matters!
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# FPGA bitstream files, the order doesn't matter anymore
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FPGA_BITSTREAMS = fpga_pm3_lf.bit fpga_pm3_hf.bit fpga_pm3_felica.bit fpga_pm3_hf_15.bit
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FPGA_BITSTREAMS = fpga_pm3_hf.bit
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ifneq ($(SKIP_LF),1)
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FPGA_BITSTREAMS += fpga_pm3_lf.bit
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endif
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ifneq ($(SKIP_FELICA),1)
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FPGA_BITSTREAMS += fpga_pm3_felica.bit
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endif
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ifneq ($(SKIP_ISO15693),1)
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FPGA_BITSTREAMS += fpga_pm3_hf_15.bit
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endif
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PLATFORM_DEFS = -DWITH_SMARTCARD -DWITH_FLASH -DRDV4
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PLATFORM_DEFS = -DWITH_SMARTCARD -DWITH_FLASH -DRDV4
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PLTNAME = Proxmark3 RDV4
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PLTNAME = Proxmark3 RDV4
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PLATFORM_FPGA = xc2s30
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PLATFORM_FPGA = xc2s30
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RDV4 = yes
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RDV4 = yes
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else ifeq ($(PLATFORM),PM3OTHER)
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else ifeq ($(PLATFORM),PM3OTHER)
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$(warning PLATFORM=PM3OTHER is deprecated, please use PLATFORM=PM3GENERIC)
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$(warning PLATFORM=PM3OTHER is deprecated, please use PLATFORM=PM3GENERIC)
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# FPGA bitstream files, the order matters!
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# FPGA bitstream files, the order doesn't matter anymore
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FPGA_BITSTREAMS = fpga_pm3_lf.bit fpga_pm3_hf.bit fpga_pm3_felica.bit fpga_pm3_hf_15.bit
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FPGA_BITSTREAMS = fpga_pm3_hf.bit
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ifneq ($(SKIP_LF),1)
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FPGA_BITSTREAMS += fpga_pm3_lf.bit
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endif
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ifneq ($(SKIP_FELICA),1)
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FPGA_BITSTREAMS += fpga_pm3_felica.bit
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endif
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ifneq ($(SKIP_ISO15693),1)
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FPGA_BITSTREAMS += fpga_pm3_hf_15.bit
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endif
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PLTNAME = Proxmark3 generic target
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PLTNAME = Proxmark3 generic target
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PLATFORM_FPGA = xc2s30
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PLATFORM_FPGA = xc2s30
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ifeq ($(LED_ORDER),PM3EASY)
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ifeq ($(LED_ORDER),PM3EASY)
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PLATFORM_DEFS = -DLED_ORDER_PM3EASY
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PLATFORM_DEFS = -DLED_ORDER_PM3EASY
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endif
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endif
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else ifeq ($(PLATFORM),PM3GENERIC)
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else ifeq ($(PLATFORM),PM3GENERIC)
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# FPGA bitstream files, the order matters!
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# FPGA bitstream files, the order doesn't matter anymore
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FPGA_BITSTREAMS = fpga_pm3_lf.bit fpga_pm3_hf.bit fpga_pm3_felica.bit fpga_pm3_hf_15.bit
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FPGA_BITSTREAMS = fpga_pm3_hf.bit
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ifneq ($(SKIP_LF),1)
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FPGA_BITSTREAMS += fpga_pm3_lf.bit
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endif
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ifneq ($(SKIP_FELICA),1)
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FPGA_BITSTREAMS += fpga_pm3_felica.bit
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endif
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ifneq ($(SKIP_ISO15693),1)
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FPGA_BITSTREAMS += fpga_pm3_hf_15.bit
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endif
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PLTNAME = Proxmark3 generic target
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PLTNAME = Proxmark3 generic target
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PLATFORM_FPGA = xc2s30
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PLATFORM_FPGA = xc2s30
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ifeq ($(LED_ORDER),PM3EASY)
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ifeq ($(LED_ORDER),PM3EASY)
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PLATFORM_DEFS = -DLED_ORDER_PM3EASY
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PLATFORM_DEFS = -DLED_ORDER_PM3EASY
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endif
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endif
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else ifeq ($(PLATFORM),PM3ICOPYX)
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else ifeq ($(PLATFORM),PM3ICOPYX)
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# FPGA bitstream files, the order matters - only hf has a bitstream, the other 3 files are 0 bytes
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# FPGA bitstream files, the order doesn't matter anymore - only hf has a bitstream, the other 3 files are 0 bytes
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FPGA_BITSTREAMS = fpga_icopyx_lf.bit fpga_icopyx_hf.bit fpga_icopyx_felica.bit fpga_icopyx_hf_15.bit
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FPGA_BITSTREAMS = fpga_icopyx_lf.bit fpga_icopyx_hf.bit fpga_icopyx_felica.bit fpga_icopyx_hf_15.bit
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PLATFORM_DEFS = -DWITH_FLASH -DICOPYX -DXC3
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PLATFORM_DEFS = -DWITH_FLASH -DICOPYX -DXC3
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PLTNAME = iCopy-X with XC3S100E
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PLTNAME = iCopy-X with XC3S100E
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@ -43,8 +43,14 @@ typedef enum
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FPGA_BITSTREAM_MAX = FPGA_BITSTREAM_HF_15,
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FPGA_BITSTREAM_MAX = FPGA_BITSTREAM_HF_15,
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} FPGA_config;
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} FPGA_config;
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typedef struct
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{
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const char *const versionString;
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const FPGA_config target_config;
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} FPGA_VERSION_INFORMATION;
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static const uint8_t bitparse_fixed_header[] = {0x00, 0x09, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x00, 0x00, 0x01};
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static const uint8_t bitparse_fixed_header[] = {0x00, 0x09, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x00, 0x00, 0x01};
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extern const int g_fpga_bitstream_num;
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extern const int g_fpga_bitstream_num;
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extern const char *const g_fpga_version_information[];
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extern const FPGA_VERSION_INFORMATION g_fpga_version_information[];
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#endif
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#endif
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@ -420,8 +420,9 @@ static void print_version_info_preamble(FILE *outfile, int num_infiles) {
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fprintf(outfile, "// This file is generated by fpga_compress. Don't edit!\n");
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fprintf(outfile, "// This file is generated by fpga_compress. Don't edit!\n");
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fprintf(outfile, "//-----------------------------------------------------------------------------\n");
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fprintf(outfile, "//-----------------------------------------------------------------------------\n");
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fprintf(outfile, "\n\n");
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fprintf(outfile, "\n\n");
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fprintf(outfile, "#include \"fpga.h\"\n\n");
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fprintf(outfile, "const int g_fpga_bitstream_num = %d;\n", num_infiles);
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fprintf(outfile, "const int g_fpga_bitstream_num = %d;\n", num_infiles);
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fprintf(outfile, "const char *const g_fpga_version_information[%d] = {\n", num_infiles);
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fprintf(outfile, "const FPGA_VERSION_INFORMATION g_fpga_version_information[%d] = {\n", num_infiles);
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}
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}
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static int generate_fpga_version_info(FILE *infile[], char *infile_names[], int num_infiles, FILE *outfile) {
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static int generate_fpga_version_info(FILE *infile[], char *infile_names[], int num_infiles, FILE *outfile) {
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@ -432,7 +433,19 @@ static int generate_fpga_version_info(FILE *infile[], char *infile_names[], int
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for (int i = 0; i < num_infiles; i++) {
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for (int i = 0; i < num_infiles; i++) {
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FpgaGatherVersion(infile[i], infile_names[i], version_string, sizeof(version_string));
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FpgaGatherVersion(infile[i], infile_names[i], version_string, sizeof(version_string));
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fprintf(outfile, " \" %s\"", version_string);
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fprintf(outfile, " { \"%s\"", version_string);
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if (!memcmp("fpga_pm3_lf.ncd", version_string, sizeof("fpga_pm3_lf.ncd") - 1))
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fprintf(outfile, ", FPGA_BITSTREAM_LF }");
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else if (!memcmp("fpga_pm3_hf_15.ncd", version_string, sizeof("fpga_pm3_hf_15.ncd") - 1))
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fprintf(outfile, ", FPGA_BITSTREAM_HF_15 }");
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else if (!memcmp("fpga_pm3_hf.ncd", version_string, sizeof("fpga_pm3_hf.ncd") - 1))
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fprintf(outfile, ", FPGA_BITSTREAM_HF }");
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else if (!memcmp("fpga_pm3_felica.ncd", version_string, sizeof("fpga_pm3_felica.ncd") - 1))
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fprintf(outfile, ", FPGA_BITSTREAM_HF_FELICA }");
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else
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fprintf(outfile, ", FPGA_BITSTREAM_UNKNOWN }");
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if (i != num_infiles - 1) {
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if (i != num_infiles - 1) {
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fprintf(outfile, ",");
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fprintf(outfile, ",");
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}
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}
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