mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-14 18:48:13 -07:00
unified static dma buffer as bigbuf_malloc, less pressure on stack size
This commit is contained in:
iceman1001
parent
85be784d26
commit
3354f0d9d3
5 changed files with 194 additions and 175 deletions
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@ -26,11 +26,8 @@
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#include "ticks.h"
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#ifndef ISO14443B_DMA_BUFFER_SIZE
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# define ISO14443B_DMA_BUFFER_SIZE 128
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#endif
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#ifndef RECEIVE_MASK
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# define RECEIVE_MASK (ISO14443B_DMA_BUFFER_SIZE-1)
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# define RECEIVE_MASK (DMA_BUFFER_SIZE - 1)
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#endif
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#define RECEIVE_SAMPLES_TIMEOUT 64
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@ -480,13 +477,7 @@ static void TransmitFor14443b_AsTag(uint8_t *response, uint16_t len) {
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// Put byte into tx holding register as soon as it is ready
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
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AT91C_BASE_SSC->SSC_THR = response[++i];
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}
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// Prevent rx holding register from overflowing
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
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volatile uint32_t b = AT91C_BASE_SSC->SSC_RHR;
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(void)b;
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AT91C_BASE_SSC->SSC_THR = response[i++];
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}
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}
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}
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@ -702,40 +693,17 @@ void SimulateIso14443bTag(uint32_t pupi) {
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* false if we are still waiting for some more
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*
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*/
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static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) {
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int v = 0, myI = ABS(ci), myQ = ABS(cq);
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// The soft decision on the bit uses an estimate of just the
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// quadrant of the reference angle, not the exact angle.
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#define MAKE_SOFT_DECISION(void) { \
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if (Demod.sumI > 0) { \
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v = ci; \
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} else { \
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v = -ci; \
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} \
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if (Demod.sumQ > 0) { \
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v += cq; \
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} else { \
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v -= cq; \
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} \
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}
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static RAMFUNC int Handle14443bTagSamplesDemod(uint16_t amplitude) {
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#define SUBCARRIER_DETECT_THRESHOLD 8
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//note: couldn't we just use MAX(ABS(ci),ABS(cq)) + (MIN(ABS(ci),ABS(cq))/2) from common.h - marshmellow
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#define CHECK_FOR_SUBCARRIER(void) { v = MAX(myI, myQ) + (MIN(myI, myQ) >> 1); }
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switch (Demod.state) {
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case DEMOD_UNSYNCD:
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CHECK_FOR_SUBCARRIER();
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// subcarrier detected
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if (v > SUBCARRIER_DETECT_THRESHOLD) {
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if (amplitude > SUBCARRIER_DETECT_THRESHOLD) {
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Demod.state = DEMOD_PHASE_REF_TRAINING;
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Demod.sumI = ci;
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Demod.sumQ = cq;
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Demod.sumI = amplitude;
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Demod.sumQ = amplitude;
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Demod.posCount = 1;
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}
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break;
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@ -743,13 +711,11 @@ static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) {
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case DEMOD_PHASE_REF_TRAINING:
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if (Demod.posCount < 8) {
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CHECK_FOR_SUBCARRIER();
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if (v > SUBCARRIER_DETECT_THRESHOLD) {
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if (amplitude > SUBCARRIER_DETECT_THRESHOLD) {
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// set the reference phase (will code a logic '1') by averaging over 32 1/fs.
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// note: synchronization time > 80 1/fs
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Demod.sumI += ci;
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Demod.sumQ += cq;
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Demod.sumI += amplitude;
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Demod.sumQ += amplitude;
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Demod.posCount++;
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} else {
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// subcarrier lost
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@ -762,9 +728,7 @@ static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) {
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case DEMOD_AWAITING_FALLING_EDGE_OF_SOF:
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MAKE_SOFT_DECISION();
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if (v < 0) { // logic '0' detected
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if (amplitude == 0) { // logic '0' detected
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Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF;
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Demod.posCount = 0; // start of SOF sequence
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} else {
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@ -779,9 +743,7 @@ static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) {
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case DEMOD_GOT_FALLING_EDGE_OF_SOF:
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Demod.posCount++;
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MAKE_SOFT_DECISION();
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if (v > 0) {
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if (amplitude > 0) {
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// low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges
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if (Demod.posCount < 9 * 2) {
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Demod.state = DEMOD_UNSYNCD;
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@ -804,9 +766,7 @@ static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) {
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case DEMOD_AWAITING_START_BIT:
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Demod.posCount++;
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MAKE_SOFT_DECISION();
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if (v > 0) {
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if (amplitude > 0) {
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if (Demod.posCount > 6 * 2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs
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LED_C_OFF();
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if (Demod.bitCount == 0 && Demod.len == 0) { // received SOF only, this is valid for iClass/Picopass
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@ -818,7 +778,7 @@ static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) {
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} else { // start bit detected
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Demod.bitCount = 0;
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Demod.posCount = 1; // this was the first half
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Demod.thisBit = v;
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Demod.thisBit = amplitude;
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Demod.shiftReg = 0;
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Demod.state = DEMOD_RECEIVING_DATA;
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}
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@ -826,15 +786,13 @@ static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) {
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case DEMOD_RECEIVING_DATA:
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MAKE_SOFT_DECISION();
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if (Demod.posCount == 0) {
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// first half of bit
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Demod.thisBit = v;
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Demod.thisBit = amplitude;
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Demod.posCount = 1;
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} else {
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// second half of bit
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Demod.thisBit += v;
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Demod.thisBit += amplitude;
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Demod.shiftReg >>= 1;
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// OR in a logic '1'
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@ -882,64 +840,66 @@ static RAMFUNC int Handle14443bTagSamplesDemod(int ci, int cq) {
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* Demodulate the samples we received from the tag, also log to tracebuffer
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*/
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static int GetTagSamplesFor14443bDemod(int timeout) {
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int ret = 0;
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int maxBehindBy = 0;
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int lastRxCounter, samples = 0;
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int8_t ci, cq;
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uint32_t time_0 = 0, time_stop = 0;
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int samples = 0, ret = 0;
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BigBuf_free();
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// The response (tag -> reader) that we're receiving.
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uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE);
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// The DMA buffer, used to stream samples from the FPGA
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uint16_t *dmaBuf = (uint16_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE * sizeof(uint16_t));
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// Set up the demodulator for tag -> reader responses.
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Demod14bInit(receivedResponse);
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Demod14bInit(BigBuf_malloc(MAX_FRAME_SIZE));
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// wait for last transfer to complete
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while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY))
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// Setup and start DMA.
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FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
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if (FpgaSetupSscDma((uint8_t *) dmaBuf, ISO14443B_DMA_BUFFER_SIZE) == false) {
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// The DMA buffer, used to stream samples from the FPGA
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dmabuf16_t *dma = get_dma16();
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if (FpgaSetupSscDma((uint8_t *) dma->buf, DMA_BUFFER_SIZE) == false) {
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if (DBGLEVEL > 1) Dbprintf("FpgaSetupSscDma failed. Exiting");
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return -1;
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}
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uint16_t *upTo = dmaBuf;
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lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
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// Signal field is ON with the appropriate LED:
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LED_D_ON();
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// And put the FPGA in the appropriate mode
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FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_848_KHZ | FPGA_HF_READER_MODE_RECEIVE_IQ);
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// uint32_t dma_start_time;
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uint16_t *upTo = dma->buf;
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for(;;) {
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int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO14443B_DMA_BUFFER_SIZE-1);
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if (behindBy > maxBehindBy) {
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maxBehindBy = behindBy;
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}
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uint16_t behindBy = ((uint16_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (DMA_BUFFER_SIZE - 1);
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if (behindBy < 1) continue;
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if (behindBy == 0) continue;
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ci = *upTo >> 8;
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cq = *upTo;
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upTo++;
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lastRxCounter--;
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if (upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
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upTo = dmaBuf; // start reading the circular buffer from the beginning
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lastRxCounter += ISO14443B_DMA_BUFFER_SIZE;
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}
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
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AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
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AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; // DMA Next Counter registers
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}
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samples++;
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/*
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if (samples == 1) {
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// DMA has transferred the very first data
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dma_start_time = GetCountSspClk() & 0xfffffff0;
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}
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*/
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if (Handle14443bTagSamplesDemod(ci, cq)) {
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volatile uint16_t tagdata = *upTo++;
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if (upTo >= dma->buf + DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
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upTo = dma->buf; // start reading the circular buffer from the beginning
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if (behindBy > (9 * DMA_BUFFER_SIZE / 10)) {
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Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
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ret = -1;
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break;
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}
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}
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
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AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dma->buf; // refresh the DMA Next Buffer and
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AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; // DMA Next Counter registers
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}
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if (Handle14443bTagSamplesDemod(tagdata)) {
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ret = Demod.len;
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break;
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}
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@ -958,7 +918,7 @@ static int GetTagSamplesFor14443bDemod(int timeout) {
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}
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if (Demod.len > 0) {
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LogTrace(Demod.output, Demod.len, time_0, time_stop, NULL, false);
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LogTrace(Demod.output, Demod.len, 0, 0, NULL, false);
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}
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return ret;
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@ -976,12 +936,14 @@ static void TransmitFor14443b_AsReader(void) {
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for (int c = 0; c < ts->max; c++) {
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uint8_t data = ts->buf[c];
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for (int i = 0; i < 8; i++) {
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uint16_t send_word = (data & 0x80) ? 0x0000 : 0xffff;
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while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) ;
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AT91C_BASE_SSC->SSC_THR = send_word;
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while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) ;
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AT91C_BASE_SSC->SSC_THR = send_word;
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@ -1388,7 +1350,7 @@ static void iso1444b_setup_sniff(void) {
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Dbprintf("[+] trace: %i bytes", BigBuf_max_traceLen());
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Dbprintf("[+] reader -> tag: %i bytes", MAX_FRAME_SIZE);
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Dbprintf("[+] tag -> reader: %i bytes", MAX_FRAME_SIZE);
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Dbprintf("[+] DMA: %i bytes", ISO14443B_DMA_BUFFER_SIZE);
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Dbprintf("[+] DMA: %i bytes", DMA_BUFFER_SIZE);
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}
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// connect Demodulated Signal to ADC:
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@ -1432,12 +1394,7 @@ void RAMFUNC SniffIso14443b(void) {
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bool TagIsActive = false;
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bool ReaderIsActive = false;
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iso1444b_setup_sniff();
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// The DMA buffer, used to stream samples from the FPGA
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uint16_t *dmaBuf = (uint16_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE * sizeof(uint16_t));
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uint16_t *upTo = dmaBuf;
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int lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
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int lastRxCounter = DMA_BUFFER_SIZE;
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int8_t ci, cq;
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int maxBehindBy = 0;
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@ -1445,8 +1402,14 @@ void RAMFUNC SniffIso14443b(void) {
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// information in the trace buffer.
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int samples = 0;
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iso1444b_setup_sniff();
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// The DMA buffer, used to stream samples from the FPGA
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dmabuf16_t *dma = get_dma16();
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uint16_t *upTo = dma->buf;
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// Setup and start DMA.
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if (!FpgaSetupSscDma((uint8_t *) dmaBuf, ISO14443B_DMA_BUFFER_SIZE)) {
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if (!FpgaSetupSscDma((uint8_t *) dma->buf, DMA_BUFFER_SIZE)) {
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if (DBGLEVEL > 1) Dbprintf("[!] FpgaSetupSscDma failed. Exiting");
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BigBuf_free();
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return;
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@ -1458,29 +1421,31 @@ void RAMFUNC SniffIso14443b(void) {
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// loop and listen
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for(;;) {
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int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO14443B_DMA_BUFFER_SIZE - 1);
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int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (DMA_BUFFER_SIZE - 1);
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if (behindBy > maxBehindBy) {
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maxBehindBy = behindBy;
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}
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if (behindBy < 1) continue;
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if (behindBy == 0) continue;
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ci = *upTo >> 8;
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cq = *upTo;
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uint16_t tagdata = *upTo;
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upTo++;
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lastRxCounter--;
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if (upTo >= dmaBuf + ISO14443B_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
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upTo = dmaBuf; // start reading the circular buffer from the beginning again
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lastRxCounter += ISO14443B_DMA_BUFFER_SIZE;
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if (behindBy > (9 * ISO14443B_DMA_BUFFER_SIZE / 10)) {
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if (upTo >= dma->buf + DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
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upTo = dma->buf; // start reading the circular buffer from the beginning again
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lastRxCounter += DMA_BUFFER_SIZE;
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if (behindBy > (9 * DMA_BUFFER_SIZE / 10)) {
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Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
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break;
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}
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}
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
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AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
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AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; // DMA Next Counter registers
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if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
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AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dma->buf; // refresh the DMA Next Buffer and
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AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; // DMA Next Counter registers
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WDT_HIT();
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if (BUTTON_PRESS()) {
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@ -1522,7 +1487,7 @@ void RAMFUNC SniffIso14443b(void) {
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// is this | 0x01 the error? & 0xfe in https://github.com/Proxmark/proxmark3/issues/103
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// LSB is a fpga signal bit.
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if (Handle14443bTagSamplesDemod(ci/2, cq/2) >= 0) {
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if (Handle14443bTagSamplesDemod(tagdata) >= 0) {
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time_stop = GetCountSspClk() - time_0;
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LogTrace(Demod.output, Demod.len, time_start, time_stop, NULL, false);
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Uart14bReset();
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