mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-20 21:33:47 -07:00
ADD: added the "hf snoop" patch original from @Enio, rearranged by @Etmatrix.
ADD: added the "t55x7" refactoring by @marshmellow42
This commit is contained in:
iceman1001
parent
1c8fbeb93e
commit
1d0ccbe04b
24 changed files with 704 additions and 604 deletions
392
armsrc/lfops.c
392
armsrc/lfops.c
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@ -16,8 +16,8 @@
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#include "string.h"
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#include "lfdemod.h"
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#include "lfsampling.h"
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#include "usb_cdc.h"
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#include "protocols.h"
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#include "usb_cdc.h" //test
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/**
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* Function to do a modulation and then get samples.
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@ -1053,61 +1053,9 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
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/*------------------------------
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* T5555/T5557/T5567 routines
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*------------------------------
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*/
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/* T55x7 configuration register definitions */
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#define T55x7_POR_DELAY 0x00000001
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#define T55x7_ST_TERMINATOR 0x00000008
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#define T55x7_PWD 0x00000010
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#define T55x7_MAXBLOCK_SHIFT 5
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#define T55x7_AOR 0x00000200
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#define T55x7_PSKCF_RF_2 0
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#define T55x7_PSKCF_RF_4 0x00000400
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#define T55x7_PSKCF_RF_8 0x00000800
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#define T55x7_MODULATION_DIRECT 0
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#define T55x7_MODULATION_PSK1 0x00001000
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#define T55x7_MODULATION_PSK2 0x00002000
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#define T55x7_MODULATION_PSK3 0x00003000
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#define T55x7_MODULATION_FSK1 0x00004000
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#define T55x7_MODULATION_FSK2 0x00005000
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#define T55x7_MODULATION_FSK1a 0x00006000
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#define T55x7_MODULATION_FSK2a 0x00007000
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#define T55x7_MODULATION_MANCHESTER 0x00008000
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#define T55x7_MODULATION_BIPHASE 0x00010000
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#define T55x7_MODULATION_DIPHASE 0x00018000
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//#define T55x7_MODULATION_BIPHASE57 0x00011000
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#define T55x7_BITRATE_RF_8 0
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#define T55x7_BITRATE_RF_16 0x00040000
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#define T55x7_BITRATE_RF_32 0x00080000
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#define T55x7_BITRATE_RF_40 0x000C0000
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#define T55x7_BITRATE_RF_50 0x00100000
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#define T55x7_BITRATE_RF_64 0x00140000
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#define T55x7_BITRATE_RF_100 0x00180000
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#define T55x7_BITRATE_RF_128 0x001C0000
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/* T5555 (Q5) configuration register definitions */
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#define T5555_ST_TERMINATOR 0x00000001
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#define T5555_MAXBLOCK_SHIFT 0x00000001
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#define T5555_MODULATION_MANCHESTER 0
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#define T5555_MODULATION_PSK1 0x00000010
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#define T5555_MODULATION_PSK2 0x00000020
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#define T5555_MODULATION_PSK3 0x00000030
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#define T5555_MODULATION_FSK1 0x00000040
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#define T5555_MODULATION_FSK2 0x00000050
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#define T5555_MODULATION_BIPHASE 0x00000060
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#define T5555_MODULATION_DIRECT 0x00000070
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#define T5555_INVERT_OUTPUT 0x00000080
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#define T5555_PSK_RF_2 0
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#define T5555_PSK_RF_4 0x00000100
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#define T5555_PSK_RF_8 0x00000200
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#define T5555_USE_PWD 0x00000400
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#define T5555_USE_AOR 0x00000800
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#define T5555_BITRATE_SHIFT 12
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#define T5555_FAST_WRITE 0x00004000
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#define T5555_PAGE_SELECT 0x00008000
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/*
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* Relevant times in microsecond
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* NOTE: T55x7/T5555 configuration register definitions moved to protocols.h
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*
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* Relevant communication times in microsecond
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* To compensate antenna falling times shorten the write times
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* and enlarge the gap ones.
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* Q5 tags seems to have issues when these values changes.
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@ -1136,24 +1084,29 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
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void TurnReadLFOn(int delay) {
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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// Give it a bit of time for the resonant antenna to settle.
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SpinDelayUs(delay); //155*8 //50*8
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// measure antenna strength.
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//int adcval = ((MAX_ADC_LF_VOLTAGE * AvgAdc(ADC_CHAN_LF)) >> 10);
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// where to save it
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SpinDelayUs(delay);
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}
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// Write one bit to card
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void T55xxWriteBit(int bit) {
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
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if (!bit)
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SpinDelayUs(WRITE_0);
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TurnReadLFOn(WRITE_0);
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else
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SpinDelayUs(WRITE_1);
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TurnReadLFOn(WRITE_1);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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SpinDelayUs(WRITE_GAP);
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}
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// Write one card block in page 0, no lock
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void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode) {
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void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t arg) {
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LED_A_ON();
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bool PwdMode = arg & 0x1;
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uint8_t Page = (arg & 0x2)>>1;
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uint32_t i = 0;
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// Set up FPGA, 125kHz
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@ -1165,8 +1118,7 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMod
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// Opcode 10
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T55xxWriteBit(1);
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T55xxWriteBit(0); //Page 0
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T55xxWriteBit(Page); //Page 0
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if (PwdMode){
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// Send Pwd
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for (i = 0x80000000; i != 0; i >>= 1)
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@ -1186,20 +1138,24 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMod
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// Perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
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// so wait a little more)
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TurnReadLFOn(20 * 1000);
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//could attempt to do a read to confirm write took
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// as the tag should repeat back the new block
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// until it is reset, but to confirm it we would
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// need to know the current block 0 config mode
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// turn field off
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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cmd_send(CMD_ACK,0,0,0,0,0);
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LED_A_OFF();
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LED_B_OFF();
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}
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// Read one card block in page 0
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void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd) {
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LED_A_ON();
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uint8_t PwdMode = arg0 & 0x01;
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uint8_t Page = arg0 & 0x02;
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bool PwdMode = arg0 & 0x1;
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uint8_t Page = (arg0 & 0x2) >> 1;
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uint32_t i = 0;
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bool RegReadMode = (Block == 0xFF);
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//clear buffer now so it does not interfere with timing later
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BigBuf_Clear_ext(false);
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@ -1207,14 +1163,14 @@ void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd) {
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//make sure block is at max 7
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Block &= 0x7;
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// Set up FPGA, 125kHz
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// Set up FPGA, 125kHz to power up the tag
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LFSetupFPGAForADC(95, true);
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// Trigger T55x7 Direct Access Mode
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// Trigger T55x7 Direct Access Mode with start gap
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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SpinDelayUs(START_GAP);
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// Opcode 10
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// Opcode 1[page]
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T55xxWriteBit(1);
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T55xxWriteBit(Page); //Page 0
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@ -1223,11 +1179,11 @@ void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd) {
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for (i = 0x80000000; i != 0; i >>= 1)
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T55xxWriteBit(Pwd & i);
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}
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// Send a zero bit separation
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T55xxWriteBit(0);
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// Send Block number
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// Send Block number (if direct access mode)
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if (!RegReadMode)
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for (i = 0x04; i != 0; i >>= 1)
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T55xxWriteBit(Block & i);
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@ -1237,54 +1193,10 @@ void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd) {
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// Acquisition
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doT55x7Acquisition();
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// turn field off
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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// Turn the field off
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
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cmd_send(CMD_ACK,0,0,0,0,0);
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LED_A_OFF();
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LED_B_OFF();
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}
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// Read card traceability data (page 1)
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void T55xxReadTrace(void){
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// LED_A_ON();
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// uint8_t PwdMode = arg0 & 0xFF;
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// uint32_t i = 0;
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// //clear buffer now so it does not interfere with timing later
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// BigBuf_Clear_ext(false);
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// // Set up FPGA, 125kHz
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// LFSetupFPGAForADC(95, true);
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// // Trigger T55x7 Direct Access Mode
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// FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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// SpinDelayUs(START_GAP);
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// // Opcode 11
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// T55xxWriteBit(1);
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// T55xxWriteBit(1); //Page 1
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// if (PwdMode){
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// // Send Pwd
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// for (i = 0x80000000; i != 0; i >>= 1)
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// T55xxWriteBit(Pwd & i);
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// }
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// // Send a zero bit separation
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// T55xxWriteBit(0);
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// // Turn field on to read the response
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// TurnReadLFOn(READ_GAP);
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// // Acquisition
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// doT55x7Acquisition();
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// // turn field off
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// FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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// cmd_send(CMD_ACK,0,0,0,0,0);
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// LED_A_OFF();
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// LED_B_OFF();
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}
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void T55xxWakeUp(uint32_t Pwd){
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@ -1306,16 +1218,23 @@ void T55xxWakeUp(uint32_t Pwd){
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for (i = 0x80000000; i != 0; i >>= 1)
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T55xxWriteBit(Pwd & i);
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// Turn field on to read the response
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// Turn and leave field on to let the begin repeating transmission
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TurnReadLFOn(20*1000);
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}
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/*-------------- Cloning routines -----------*/
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void WriteT55xx(uint32_t *blockdata, uint8_t startblock, uint8_t numblocks) {
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// write last block first and config block last (if included)
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for (uint8_t i = numblocks; i > startblock; i--)
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T55xxWriteBlock(blockdata[i-1],i-1,0,0);
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}
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// Copy HID id to card and setup block 0 config
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void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
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{
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int data1=0, data2=0, data3=0, data4=0, data5=0, data6=0; //up to six blocks for long format
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int last_block = 0;
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void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT) {
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uint32_t data[] = {0,0,0,0,0,0,0};
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//int data1=0, data2=0, data3=0, data4=0, data5=0, data6=0; //up to six blocks for long format
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uint8_t last_block = 0;
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if (longFMT){
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// Ensure no more than 84 bits supplied
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@ -1325,108 +1244,34 @@ void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
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}
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// Build the 6 data blocks for supplied 84bit ID
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last_block = 6;
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data1 = 0x1D96A900; // load preamble (1D) & long format identifier (9E manchester encoded)
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for (int i=0;i<4;i++) {
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if (hi2 & (1<<(19-i)))
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data1 |= (1<<(((3-i)*2)+1)); // 1 -> 10
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else
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data1 |= (1<<((3-i)*2)); // 0 -> 01
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}
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data2 = 0;
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for (int i=0;i<16;i++) {
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if (hi2 & (1<<(15-i)))
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data2 |= (1<<(((15-i)*2)+1)); // 1 -> 10
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else
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data2 |= (1<<((15-i)*2)); // 0 -> 01
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}
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data3 = 0;
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for (int i=0;i<16;i++) {
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if (hi & (1<<(31-i)))
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data3 |= (1<<(((15-i)*2)+1)); // 1 -> 10
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else
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data3 |= (1<<((15-i)*2)); // 0 -> 01
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}
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data4 = 0;
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for (int i=0;i<16;i++) {
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if (hi & (1<<(15-i)))
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data4 |= (1<<(((15-i)*2)+1)); // 1 -> 10
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else
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data4 |= (1<<((15-i)*2)); // 0 -> 01
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}
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data5 = 0;
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for (int i=0;i<16;i++) {
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if (lo & (1<<(31-i)))
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data5 |= (1<<(((15-i)*2)+1)); // 1 -> 10
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else
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data5 |= (1<<((15-i)*2)); // 0 -> 01
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}
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data6 = 0;
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for (int i=0;i<16;i++) {
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if (lo & (1<<(15-i)))
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data6 |= (1<<(((15-i)*2)+1)); // 1 -> 10
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else
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data6 |= (1<<((15-i)*2)); // 0 -> 01
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}
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}
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else {
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// load preamble (1D) & long format identifier (9E manchester encoded)
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data[1] = 0x1D96A900 | manchesterEncode2Bytes((hi2 >> 16) & 0xF);
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// load raw id from hi2, hi, lo to data blocks (manchester encoded)
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data[2] = manchesterEncode2Bytes(hi2 & 0xFFFF);
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data[3] = manchesterEncode2Bytes(hi >> 16);
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data[4] = manchesterEncode2Bytes(hi & 0xFFFF);
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data[5] = manchesterEncode2Bytes(lo >> 16);
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data[6] = manchesterEncode2Bytes(lo & 0xFFFF);
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} else {
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// Ensure no more than 44 bits supplied
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if (hi>0xFFF) {
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DbpString("Tags can only have 44 bits.");
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return;
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}
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// Build the 3 data blocks for supplied 44bit ID
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last_block = 3;
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data1 = 0x1D000000; // load preamble
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for (int i=0;i<12;i++) {
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if (hi & (1<<(11-i)))
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data1 |= (1<<(((11-i)*2)+1)); // 1 -> 10
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else
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data1 |= (1<<((11-i)*2)); // 0 -> 01
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}
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data2 = 0;
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for (int i=0;i<16;i++) {
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if (lo & (1<<(31-i)))
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data2 |= (1<<(((15-i)*2)+1)); // 1 -> 10
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else
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data2 |= (1<<((15-i)*2)); // 0 -> 01
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}
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data3 = 0;
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for (int i=0;i<16;i++) {
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if (lo & (1<<(15-i)))
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data3 |= (1<<(((15-i)*2)+1)); // 1 -> 10
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else
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data3 |= (1<<((15-i)*2)); // 0 -> 01
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}
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// load preamble
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data[1] = 0x1D000000 | manchesterEncode2Bytes(hi & 0xFFF);
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data[2] = manchesterEncode2Bytes(lo >> 16);
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data[3] = manchesterEncode2Bytes(lo & 0xFFFF);
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}
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// load chip config block
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data[0] = T55x7_BITRATE_RF_50 | T55x7_MODULATION_FSK2a | last_block << T55x7_MAXBLOCK_SHIFT;
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LED_D_ON();
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// Program the data blocks for supplied ID
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// and the block 0 for HID format
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T55xxWriteBlock(data1,1,0,0);
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T55xxWriteBlock(data2,2,0,0);
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T55xxWriteBlock(data3,3,0,0);
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if (longFMT) { // if long format there are 6 blocks
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T55xxWriteBlock(data4,4,0,0);
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T55xxWriteBlock(data5,5,0,0);
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T55xxWriteBlock(data6,6,0,0);
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}
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// Config for HID (RF/50, FSK2a, Maxblock=3 for short/6 for long)
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T55xxWriteBlock(T55x7_BITRATE_RF_50 |
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T55x7_MODULATION_FSK2a |
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last_block << T55x7_MAXBLOCK_SHIFT,
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0,0,0);
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WriteT55xx(data, 0, last_block+1);
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LED_D_OFF();
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@ -1435,24 +1280,42 @@ void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
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void CopyIOtoT55x7(uint32_t hi, uint32_t lo, uint8_t longFMT)
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{
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int data1=0, data2=0; //up to six blocks for long format
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data1 = hi; // load preamble
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data2 = lo;
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uint32_t data[] = {T55x7_BITRATE_RF_64 | T55x7_MODULATION_FSK2a | (2 << T55x7_MAXBLOCK_SHIFT), hi, lo};
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LED_D_ON();
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// Program the data blocks for supplied ID
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// and the block 0 for HID format
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T55xxWriteBlock(data1,1,0,0);
|
||||
T55xxWriteBlock(data2,2,0,0);
|
||||
// and the block 0 config
|
||||
WriteT55xx(data, 0, 3);
|
||||
|
||||
//Config Block
|
||||
T55xxWriteBlock(0x00147040,0,0,0);
|
||||
LED_D_OFF();
|
||||
|
||||
DbpString("DONE!");
|
||||
}
|
||||
|
||||
// Clone Indala 64-bit tag by UID to T55x7
|
||||
void CopyIndala64toT55x7(uint32_t hi, uint32_t lo) {
|
||||
//Program the 2 data blocks for supplied 64bit UID
|
||||
// and the Config for Indala 64 format (RF/32;PSK1 with RF/2;Maxblock=2)
|
||||
uint32_t data[] = { T55x7_BITRATE_RF_32 | T55x7_MODULATION_PSK1 | (2 << T55x7_MAXBLOCK_SHIFT), hi, lo};
|
||||
WriteT55xx(data, 0, 3);
|
||||
//Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=2;Inverse data)
|
||||
// T5567WriteBlock(0x603E1042,0);
|
||||
DbpString("DONE!");
|
||||
}
|
||||
// Clone Indala 224-bit tag by UID to T55x7
|
||||
void CopyIndala224toT55x7(uint32_t uid1, uint32_t uid2, uint32_t uid3, uint32_t uid4, uint32_t uid5, uint32_t uid6, uint32_t uid7)
|
||||
{
|
||||
//Program the 7 data blocks for supplied 224bit UID
|
||||
uint32_t data[] = {0, uid1, uid2, uid3, uid4, uid5, uid6, uid7};
|
||||
// and the block 0 for Indala224 format
|
||||
//Config for Indala (RF/32;PSK1 with RF/2;Maxblock=7)
|
||||
data[0] = T55x7_BITRATE_RF_32 | T55x7_MODULATION_PSK1 | (7 << T55x7_MAXBLOCK_SHIFT);
|
||||
WriteT55xx(data, 0, 8);
|
||||
//Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=7;Inverse data)
|
||||
// T5567WriteBlock(0x603E10E2,0);
|
||||
DbpString("DONE!");
|
||||
}
|
||||
|
||||
// Define 9bit header for EM410x tags
|
||||
#define EM410X_HEADER 0x1FF
|
||||
#define EM410X_ID_LENGTH 40
|
||||
|
|
@ -1518,94 +1381,29 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
|
|||
LED_D_ON();
|
||||
|
||||
// Write EM410x ID
|
||||
T55xxWriteBlock((uint32_t)(id >> 32), 1, 0, 0);
|
||||
T55xxWriteBlock((uint32_t)id, 2, 0, 0);
|
||||
|
||||
// Config for EM410x (RF/64, Manchester, Maxblock=2)
|
||||
uint32_t data[] = {0, id>>32, id & 0xFFFF};
|
||||
if (card) {
|
||||
// Clock rate is stored in bits 8-15 of the card value
|
||||
clock = (card & 0xFF00) >> 8;
|
||||
clock = (clock == 0) ? 64 : clock;
|
||||
Dbprintf("Clock rate: %d", clock);
|
||||
switch (clock) {
|
||||
case 50:
|
||||
clock = T55x7_BITRATE_RF_50;
|
||||
case 40:
|
||||
clock = T55x7_BITRATE_RF_40;
|
||||
case 32:
|
||||
clock = T55x7_BITRATE_RF_32;
|
||||
break;
|
||||
case 16:
|
||||
clock = T55x7_BITRATE_RF_16;
|
||||
break;
|
||||
case 0:
|
||||
// A value of 0 is assumed to be 64 for backwards-compatibility
|
||||
// Fall through...
|
||||
case 64:
|
||||
clock = T55x7_BITRATE_RF_64;
|
||||
break;
|
||||
default:
|
||||
clock = GetT55xxClockBit(clock);
|
||||
if (clock == 0) {
|
||||
Dbprintf("Invalid clock rate: %d", clock);
|
||||
return;
|
||||
}
|
||||
|
||||
// Writing configuration for T55x7 tag
|
||||
T55xxWriteBlock(clock |
|
||||
T55x7_MODULATION_MANCHESTER |
|
||||
2 << T55x7_MAXBLOCK_SHIFT,
|
||||
0, 0, 0);
|
||||
data[0] = clock | T55x7_MODULATION_MANCHESTER | (2 << T55x7_MAXBLOCK_SHIFT);
|
||||
} else {
|
||||
data[0] = (0x1F << T5555_BITRATE_SHIFT) | T5555_MODULATION_MANCHESTER | (2 << T5555_MAXBLOCK_SHIFT);
|
||||
}
|
||||
else
|
||||
// Writing configuration for T5555(Q5) tag
|
||||
T55xxWriteBlock(0x1F << T5555_BITRATE_SHIFT |
|
||||
T5555_MODULATION_MANCHESTER |
|
||||
2 << T5555_MAXBLOCK_SHIFT,
|
||||
0, 0, 0);
|
||||
|
||||
WriteT55xx(data, 0, 3);
|
||||
|
||||
LED_D_OFF();
|
||||
Dbprintf("Tag %s written with 0x%08x%08x\n", card ? "T55x7":"T5555",
|
||||
(uint32_t)(id >> 32), (uint32_t)id);
|
||||
}
|
||||
|
||||
// Clone Indala 64-bit tag by UID to T55x7
|
||||
void CopyIndala64toT55x7(int hi, int lo)
|
||||
{
|
||||
//Program the 2 data blocks for supplied 64bit UID
|
||||
// and the block 0 for Indala64 format
|
||||
T55xxWriteBlock(hi,1,0,0);
|
||||
T55xxWriteBlock(lo,2,0,0);
|
||||
//Config for Indala (RF/32;PSK1 with RF/2;Maxblock=2)
|
||||
T55xxWriteBlock(T55x7_BITRATE_RF_32 |
|
||||
T55x7_MODULATION_PSK1 |
|
||||
2 << T55x7_MAXBLOCK_SHIFT,
|
||||
0, 0, 0);
|
||||
//Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=2;Inverse data)
|
||||
// T5567WriteBlock(0x603E1042,0);
|
||||
|
||||
DbpString("DONE!");
|
||||
}
|
||||
|
||||
void CopyIndala224toT55x7(int uid1, int uid2, int uid3, int uid4, int uid5, int uid6, int uid7)
|
||||
{
|
||||
//Program the 7 data blocks for supplied 224bit UID
|
||||
// and the block 0 for Indala224 format
|
||||
T55xxWriteBlock(uid1,1,0,0);
|
||||
T55xxWriteBlock(uid2,2,0,0);
|
||||
T55xxWriteBlock(uid3,3,0,0);
|
||||
T55xxWriteBlock(uid4,4,0,0);
|
||||
T55xxWriteBlock(uid5,5,0,0);
|
||||
T55xxWriteBlock(uid6,6,0,0);
|
||||
T55xxWriteBlock(uid7,7,0,0);
|
||||
//Config for Indala (RF/32;PSK1 with RF/2;Maxblock=7)
|
||||
T55xxWriteBlock(T55x7_BITRATE_RF_32 |
|
||||
T55x7_MODULATION_PSK1 |
|
||||
7 << T55x7_MAXBLOCK_SHIFT,
|
||||
0,0,0);
|
||||
//Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=7;Inverse data)
|
||||
// T5567WriteBlock(0x603E10E2,0);
|
||||
|
||||
DbpString("DONE!");
|
||||
}
|
||||
|
||||
//-----------------------------------
|
||||
// EM4469 / EM4305 routines
|
||||
//-----------------------------------
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue