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CHG: @marshmellow42 's changes to lfops.c /lfsampling.c
CHG: updated CHANGELOG.md
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6ac2301423
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4 changed files with 47 additions and 21 deletions
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@ -326,7 +326,6 @@ void AcquireTiType(void)
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// if not provided a valid crc will be computed from the data and written.
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void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
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{
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StartTicks();
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FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
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if(crc == 0) {
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crc = update_crc16(crc, (idlo)&0xff);
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@ -347,8 +346,10 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
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// whether we're modulating the antenna (high)
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// or listening to the antenna (low)
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_PASSTHRU);
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StartTicks();
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LED_A_ON();
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// steal this pin from the SSP and use it to control the modulation
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AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
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AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
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@ -361,7 +362,7 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
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// then write 80 bits of data (or 64 bit data + 16 bit crc if you prefer)
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// finally end with 0x0300 (write frame)
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// all data is sent lsb first
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// finish with 15ms programming time
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// finish with 50ms programming time
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// modulate antenna
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HIGH(GPIO_SSC_DOUT);
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@ -399,7 +400,8 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
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int i = 0;
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uint8_t *buf = BigBuf_get_addr();
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_PASSTHRU);
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//FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
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//FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD);
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//FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_TOGGLE_MODE );
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@ -420,8 +422,9 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
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AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_CLK;
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// power on antenna
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// OPEN_COIL();
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// SpinDelay(50);
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OPEN_COIL();
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// charge time
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WaitMS(50);
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for(;;) {
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WDT_HIT();
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@ -1699,7 +1702,6 @@ void EM4xLogin(uint32_t pwd) {
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void EM4xReadWord(uint8_t addr, uint32_t pwd, uint8_t usepwd) {
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LED_A_ON();
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uint8_t len;
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//clear buffer now so it does not interfere with timing later
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@ -1719,7 +1721,9 @@ void EM4xReadWord(uint8_t addr, uint32_t pwd, uint8_t usepwd) {
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SendForward(len);
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DoAcquisition_default(0, TRUE);
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WaitUS(400);
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// Now do the acquisition
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DoPartialAcquisition(20, true, 6000);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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cmd_send(CMD_ACK,0,0,0,0,0);
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@ -1753,10 +1757,10 @@ void EM4xWriteWord(uint32_t flag, uint32_t data, uint32_t pwd) {
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SendForward(len);
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//Wait 20ms for write to complete?
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WaitMS(10);
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WaitMS(6);
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//Capture response if one exists
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DoAcquisition_default(20, TRUE);
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DoPartialAcquisition(20, true, 6000);
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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cmd_send(CMD_ACK,0,0,0,0,0);
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