Merge pull request #2899 from rfidgeek1337/patch-1

LF HITAG: Adjust timing for LF ADC measurements to increase stability when the tag is in public mode/TTF mode
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Iceman 2025-06-12 22:05:12 +02:00 committed by GitHub
commit 16fab8bd44
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2 changed files with 8 additions and 2 deletions

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@ -40,6 +40,7 @@ This project uses the changelog in accordance with [keepchangelog](http://keepac
- Added `hf_mfu_ultra.lua` script enables restoring dump to ULTRA/UL-5 tags and clearing previously written ULTRA tags (@mak-42) - Added `hf_mfu_ultra.lua` script enables restoring dump to ULTRA/UL-5 tags and clearing previously written ULTRA tags (@mak-42)
- Fixed `hf mfu sim` to make persistent the counter increases in the emulator memory (@sup3rgiu) - Fixed `hf mfu sim` to make persistent the counter increases in the emulator memory (@sup3rgiu)
- Fixed `hf mf mad` to correctly display MAD version 2 card publisher sector (@BIOS9) - Fixed `hf mf mad` to correctly display MAD version 2 card publisher sector (@BIOS9)
- Fixed `lf hitag dump` and related commands stability when tag is configured in public mode/TTF mode (@rfidgeek1337)
## [Blue Ice.4.20142][2025-03-25] ## [Blue Ice.4.20142][2025-03-25]
- Added `des_talk.py` script for easier MIFARE DESFire handling (@trigat) - Added `des_talk.py` script for easier MIFARE DESFire handling (@trigat)

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@ -236,8 +236,13 @@ void lf_init(bool reader, bool simulate, bool ledcontrol) {
FpgaSetupSsc(FPGA_MAJOR_MODE_LF_READER); FpgaSetupSsc(FPGA_MAJOR_MODE_LF_READER);
// When in reader mode, give the field a bit of time to settle. // When in reader mode, give the field a bit of time to settle.
// 313T0 = 313 * 8us = 2504us = 2.5ms Hitag2 tags needs to be fully powered. // Optimal timing window for LF ADC measurements to be performed:
SpinDelay(10); // minimum: 313T0 = 313 * 8us = 2504us = 2.50ms - Hitag2 tag internal powerup time
// 280T0 = 280 * 8us = 2240us = 2.24ms - HitagS minimum time before the first command (powerup time)
// maximum: 545T0 = 545 * 8us = 4360us = 4.36ms - Hitag2 command waiting time before it starts transmitting in public mode (if configured so)
// 565T0 = 565 * 8us = 4520us = 4.52ms - HitagS waiting time before entering TTF mode (if configured so)
// Thus (2.50 ms + 4.36 ms) / 2 ~= 3 ms (rounded down to integer), should be a good timing for both tag models
SpinDelay(3);
// Steal this pin from the SSP (SPI communication channel with fpga) and use it to control the modulation // Steal this pin from the SSP (SPI communication channel with fpga) and use it to control the modulation
AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT; AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;