After testing and verification its found that the SHALLOW MODULATION in HF is not working well in RDV4. Swapping from PWR_OE4 to PWR_OE1 makes it much better. Thanks to @d18c7db for solution and @gentlekiwi for testing and never giving up on finding the bug

fpga/define.v

@@ -129,6 +129,7 @@
 `define FPGA_HF_READER_MODE_SNIFF_AMPLITUDE         6
 `define FPGA_HF_READER_MODE_SNIFF_PHASE             7
 `define FPGA_HF_READER_MODE_SEND_JAM                8
+`define FPGA_HF_READER_MODE_SEND_SHALLOW_MOD_RDV4   9
 
 `define FPGA_HF_READER_SUBCARRIER_848_KHZ           0
 `define FPGA_HF_READER_SUBCARRIER_424_KHZ           1

fpga/hi_reader.v

@@ -28,7 +28,7 @@ module hi_reader(
     output adc_clk,
     output pwr_lo,
     output reg pwr_hi,
-    output pwr_oe1,
+    output reg pwr_oe1,
     output pwr_oe2,
     output pwr_oe3,
     output reg pwr_oe4,
@@ -412,6 +412,11 @@ begin
         pwr_hi  = ck_1356meg;
         pwr_oe4 = ssp_dout;
     end
+    else if (minor_mode == `FPGA_HF_READER_MODE_SEND_SHALLOW_MOD_RDV4)
+    begin
+        pwr_hi  = ck_1356meg;
+        pwr_oe1 = ssp_dout;
+    end
     else if (minor_mode == `FPGA_HF_READER_MODE_SEND_FULL_MOD)
     begin
         pwr_hi  = ck_1356meg & ~ssp_dout;
@@ -437,7 +442,7 @@ begin
 end
 
 // always on
-assign pwr_oe1 = 1'b0;
+// assign pwr_oe1 = 1'b0;
 assign pwr_oe3 = 1'b0;
 
 // Unused.