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ARM code cleanup (lfops)
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parent
6f5cb60c46
commit
0d974852ce
2 changed files with 35 additions and 42 deletions
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@ -25,7 +25,7 @@ void ToSendStuffBit(int b);
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void ToSendReset(void);
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void ListenReaderField(int limit);
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void AcquireRawAdcSamples125k(BOOL at134khz);
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void DoAcquisition125k(BOOL at134khz);
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void DoAcquisition125k(void);
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extern int ToSendMax;
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extern BYTE ToSend[];
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extern DWORD BigBuf[];
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@ -71,9 +71,8 @@ void SetAdcMuxFor(DWORD whichGpio);
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/// lfops.h
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void AcquireRawAdcSamples125k(BOOL at134khz);
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void DoAcquisition125k(BOOL at134khz);
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void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,BYTE *command);
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void ReadTItag();
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void ReadTItag(void);
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void WriteTItag(DWORD idhi, DWORD idlo, WORD crc);
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void AcquireTiType(void);
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void AcquireRawBitsTI(void);
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@ -13,13 +13,12 @@ int sprintf(char *dest, const char *fmt, ...);
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void AcquireRawAdcSamples125k(BOOL at134khz)
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{
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if(at134khz) {
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if (at134khz)
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
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} else {
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else
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
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}
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// Connect the A/D to the peak-detected low-frequency path.
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SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
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@ -31,11 +30,11 @@ void AcquireRawAdcSamples125k(BOOL at134khz)
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FpgaSetupSsc();
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// Now call the acquisition routine
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DoAcquisition125k(at134khz);
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DoAcquisition125k();
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}
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// split into two routines so we can avoid timing issues after sending commands //
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void DoAcquisition125k(BOOL at134khz)
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void DoAcquisition125k(void)
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{
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BYTE *dest = (BYTE *)BigBuf;
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int n = sizeof(BigBuf);
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@ -56,8 +55,8 @@ void DoAcquisition125k(BOOL at134khz)
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if (i >= n) break;
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}
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}
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sprintf(output_string, "read samples, dest[0]=%x dest[1]=%x at134khz=%d",
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dest[0], dest[1], at134khz);
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sprintf(output_string, "read samples, dest[0]=%x dest[1]=%x",
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dest[0], dest[1]);
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DbpString(output_string);
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}
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@ -75,13 +74,12 @@ void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,BYT
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else
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at134khz = FALSE;
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if(at134khz) {
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if (at134khz)
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
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} else {
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else
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
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}
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// Give it a bit of time for the resonant antenna to settle.
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SpinDelay(50);
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@ -92,38 +90,34 @@ void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,BYT
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FpgaSetupSsc();
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// now modulate the reader field
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while(*command != '\0' && *command != ' ')
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{
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while(*command != '\0' && *command != ' ') {
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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LED_D_OFF();
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SpinDelayUs(delay_off);
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if(at134khz) {
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if (at134khz)
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
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} else {
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else
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
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}
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LED_D_ON();
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if(*(command++) == '0') {
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if(*(command++) == '0')
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SpinDelayUs(period_0);
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} else {
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else
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SpinDelayUs(period_1);
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}
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}
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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LED_D_OFF();
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SpinDelayUs(delay_off);
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if(at134khz) {
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if (at134khz)
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
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} else {
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else
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FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
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FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
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}
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// now do the read
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DoAcquisition125k(at134khz);
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DoAcquisition125k();
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}
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/* blank r/w tag data stream
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@ -135,7 +129,7 @@ void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,BYT
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[5555fe852c5555555555555555fe0000]
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*/
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void ReadTItag()
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void ReadTItag(void)
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{
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// some hardcoded initial params
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// when we read a TI tag we sample the zerocross line at 2Mhz
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