From 0ffb748f5e7eedaa89ea852cdae66d19d9294134 Mon Sep 17 00:00:00 2001 From: iceman1001 Date: Mon, 14 Oct 2019 21:17:41 +0200 Subject: [PATCH 01/11] fix: hi/low should not be same --- common/lfdemod.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/common/lfdemod.c b/common/lfdemod.c index 30990ec73..2a9983130 100644 --- a/common/lfdemod.c +++ b/common/lfdemod.c @@ -201,7 +201,7 @@ void getHiLo(int *high, int *low, uint8_t fuzzHi, uint8_t fuzzLo) { } // if fuzzing to great and overlap - if (*high < *low) { + if (*high <= *low) { *high = signalprop.high; *low = signalprop.low; } @@ -1723,7 +1723,6 @@ int nrzRawDemod(uint8_t *dest, size_t *size, int *clk, int *invert, int *startId size_t i; int high, low; - getHiLo(&high, &low, 75, 75); getHiLo(&high, &low, 75, 75); uint8_t bit = 0; From bd13f72a59e8a094c5022eb79fefb1469c8c3e91 Mon Sep 17 00:00:00 2001 From: iceman1001 Date: Mon, 14 Oct 2019 22:32:58 +0200 Subject: [PATCH 02/11] textual --- client/cmdhficlass.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/client/cmdhficlass.c b/client/cmdhficlass.c index 67aa84396..bb20e5b3a 100644 --- a/client/cmdhficlass.c +++ b/client/cmdhficlass.c @@ -150,7 +150,7 @@ static int usage_hf_iclass_writeblock(void) { return PM3_SUCCESS; } static int usage_hf_iclass_readblock(void) { - PrintAndLogEx(NORMAL, "Usage: hf iclass readblk b k [c|e|r|v]\n"); + PrintAndLogEx(NORMAL, "Usage: hf iclass rdbl b k [c|e|r|v]\n"); PrintAndLogEx(NORMAL, "Options:"); PrintAndLogEx(NORMAL, " b : The block number as 2 hex symbols"); PrintAndLogEx(NORMAL, " k : Access Key as 16 hex symbols or 1 hex to select key from memory"); @@ -159,9 +159,9 @@ static int usage_hf_iclass_readblock(void) { PrintAndLogEx(NORMAL, " r : raw, no computations applied to key"); PrintAndLogEx(NORMAL, " v : verbose output"); PrintAndLogEx(NORMAL, "Examples:"); - PrintAndLogEx(NORMAL, " hf iclass readblk b 06 k 0011223344556677"); - PrintAndLogEx(NORMAL, " hf iclass readblk b 1B k 0011223344556677 c"); - PrintAndLogEx(NORMAL, " hf iclass readblk b 0A k 0"); + PrintAndLogEx(NORMAL, " hf iclass rdbl b 06 k 0011223344556677"); + PrintAndLogEx(NORMAL, " hf iclass rdbl b 1B k 0011223344556677 c"); + PrintAndLogEx(NORMAL, " hf iclass rdbl b 0A k 0"); return PM3_SUCCESS; } static int usage_hf_iclass_readtagfile() { From 2173cadf23c4b678e1392cdda370b134f741ef8f Mon Sep 17 00:00:00 2001 From: Philippe Teuwen Date: Tue, 15 Oct 2019 13:06:46 +0200 Subject: [PATCH 03/11] openocd scripts: allow to call them from another dir --- tools/jtag_openocd/openocd_flash_dump.sh | 1 + tools/jtag_openocd/openocd_flash_recovery.sh | 1 + tools/jtag_openocd/openocd_interactive.sh | 1 + 3 files changed, 3 insertions(+) diff --git a/tools/jtag_openocd/openocd_flash_dump.sh b/tools/jtag_openocd/openocd_flash_dump.sh index 497847dd1..650c218f1 100755 --- a/tools/jtag_openocd/openocd_flash_dump.sh +++ b/tools/jtag_openocd/openocd_flash_dump.sh @@ -1,5 +1,6 @@ #!/bin/bash +cd $(dirname "$0") . openocd_configuration || exit 1 if [ -e "$DUMP" ]; then diff --git a/tools/jtag_openocd/openocd_flash_recovery.sh b/tools/jtag_openocd/openocd_flash_recovery.sh index 2e88c52e6..80caa08f0 100755 --- a/tools/jtag_openocd/openocd_flash_recovery.sh +++ b/tools/jtag_openocd/openocd_flash_recovery.sh @@ -1,5 +1,6 @@ #!/bin/bash +cd $(dirname "$0") . openocd_configuration || exit 1 if [ ! -e "$IMAGE" ]; then diff --git a/tools/jtag_openocd/openocd_interactive.sh b/tools/jtag_openocd/openocd_interactive.sh index ea7919da8..ac022f3f2 100755 --- a/tools/jtag_openocd/openocd_interactive.sh +++ b/tools/jtag_openocd/openocd_interactive.sh @@ -1,5 +1,6 @@ #!/bin/bash +cd $(dirname "$0") . openocd_configuration || exit 1 echo "*********************************************" From c7d84ce2399cee2322f7b32b1610e5d264f2ef91 Mon Sep 17 00:00:00 2001 From: Philippe Teuwen Date: Tue, 15 Oct 2019 14:07:20 +0200 Subject: [PATCH 04/11] hw status: Detect slow clock drift problems --- armsrc/appmain.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/armsrc/appmain.c b/armsrc/appmain.c index b524c4883..a0c9a78f2 100644 --- a/armsrc/appmain.c +++ b/armsrc/appmain.c @@ -354,6 +354,17 @@ void SendStatus(void) { while ((AT91C_BASE_PMC->PMC_MCFR & AT91C_CKGR_MAINRDY) == 0); // Wait for MAINF value to become available... uint16_t mainf = AT91C_BASE_PMC->PMC_MCFR & AT91C_CKGR_MAINF; // Get # main clocks within 16 slow clocks Dbprintf(" Slow clock..............%d Hz", (16 * MAINCK) / mainf); + uint32_t delta_time = 0; + uint32_t start_time = GetTickCount(); + #define SLCK_CHECK_MS 50 + WaitMS(SLCK_CHECK_MS); + delta_time = GetTickCountDelta(start_time); + if ((delta_time < SLCK_CHECK_MS - 1) || (delta_time > SLCK_CHECK_MS + 1)) { + // error > 2% with SLCK_CHECK_MS=50 + Dbprintf(_RED_(" Slow Clock speed change detected, TIA needed")); + Dbprintf(_YELLOW_(" Slow Clock actual speed seems closer to %d kHz"), + (16 * MAINCK / 1000) / mainf * delta_time / SLCK_CHECK_MS); + } DbpString(_BLUE_("Installed StandAlone Mode")); ModInfo(); From 3fce47d023f7c54bb05b64772d27442808a07a4b Mon Sep 17 00:00:00 2001 From: Philippe Teuwen Date: Tue, 15 Oct 2019 14:21:26 +0200 Subject: [PATCH 05/11] Add `hw tia` to trigger a new Timing Interval Acquisition --- armsrc/Makefile | 1 + armsrc/appmain.c | 19 ++++++++++++++ bootrom/Makefile | 1 + bootrom/bootrom.c | 41 ++---------------------------- client/cmdhw.c | 13 ++++++++++ common_arm/clocks.c | 62 +++++++++++++++++++++++++++++++++++++++++++++ common_arm/clocks.h | 10 ++++++++ include/pm3_cmd.h | 1 + 8 files changed, 109 insertions(+), 39 deletions(-) create mode 100644 common_arm/clocks.c create mode 100644 common_arm/clocks.h diff --git a/armsrc/Makefile b/armsrc/Makefile index f94868b6e..beb19c243 100644 --- a/armsrc/Makefile +++ b/armsrc/Makefile @@ -109,6 +109,7 @@ THUMBSRC = start.c \ string.c \ BigBuf.c \ ticks.c \ + clocks.c \ hfsnoop.c diff --git a/armsrc/appmain.c b/armsrc/appmain.c index a0c9a78f2..f2e4424ee 100644 --- a/armsrc/appmain.c +++ b/armsrc/appmain.c @@ -11,6 +11,7 @@ //----------------------------------------------------------------------------- #include "appmain.h" +#include "clocks.h" #include "usb_cdc.h" #include "proxmark3_arm.h" #include "dbprint.h" @@ -303,6 +304,14 @@ void SendVersion(void) { reply_ng(CMD_VERSION, PM3_SUCCESS, (uint8_t *)&payload, 12 + payload.versionstr_len); } +void TimingIntervalAcquisition(void) { + // trigger new acquisition by turning main oscillator off and on + mck_from_pll_to_slck(); + mck_from_slck_to_pll(false); + // wait for MCFR and recompute RTMR scaler + StartTickCount(); +} + // measure the Connection Speed by sending SpeedTestBufferSize bytes to client and measuring the elapsed time. // Note: this mimics GetFromBigbuf(), i.e. we have the overhead of the PacketCommandNG structure included. void printConnSpeed(void) { @@ -1889,6 +1898,16 @@ static void PacketReceived(PacketCommandNG *packet) { SendStatus(); break; } + case CMD_TIA: { + uint16_t mainf = AT91C_BASE_PMC->PMC_MCFR & AT91C_CKGR_MAINF; + Dbprintf(" Slow clock old measured value:.........%d Hz", (16 * MAINCK) / mainf); + TimingIntervalAcquisition(); + mainf = AT91C_BASE_PMC->PMC_MCFR & AT91C_CKGR_MAINF; + Dbprintf(""); // first message gets lost + Dbprintf(" Slow clock new measured value:.........%d Hz", (16 * MAINCK) / mainf); + reply_ng(CMD_TIA, PM3_SUCCESS, NULL, 0); + break; + } case CMD_STANDALONE: { RunMod(); break; diff --git a/bootrom/Makefile b/bootrom/Makefile index d666f3acd..5c7823896 100644 --- a/bootrom/Makefile +++ b/bootrom/Makefile @@ -9,6 +9,7 @@ # DO NOT use thumb mode in the phase 1 bootloader since that generates a section with glue code ARMSRC = THUMBSRC = usb_cdc.c \ + clocks.c \ bootrom.c ASMSRC = ram-reset.s flash-reset.s diff --git a/bootrom/bootrom.c b/bootrom/bootrom.c index 4b255536f..081a49c24 100644 --- a/bootrom/bootrom.c +++ b/bootrom/bootrom.c @@ -6,6 +6,7 @@ // Main code for the bootloader //----------------------------------------------------------------------------- +#include "clocks.h" #include "usb_cdc.h" #include "proxmark3_arm.h" @@ -68,45 +69,7 @@ static void ConfigClocks(void) { (1 << AT91C_ID_PWMC) | (1 << AT91C_ID_UDP); - // worst case scenario, with MAINCK = 16MHz xtal, startup delay is 1.4ms - // if SLCK slow clock runs at its worst case (max) frequency of 42kHz - // max startup delay = (1.4ms*42k)/8 = 7.356 so round up to 8 - - // enable main oscillator and set startup delay - AT91C_BASE_PMC->PMC_MOR = - AT91C_CKGR_MOSCEN | - PMC_MAIN_OSC_STARTUP_DELAY(8); - - // wait for main oscillator to stabilize - while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS)) {}; - - // PLL output clock frequency in range 80 - 160 MHz needs CKGR_PLL = 00 - // PLL output clock frequency in range 150 - 180 MHz needs CKGR_PLL = 10 - // PLL output is MAINCK * multiplier / divisor = 16MHz * 12 / 2 = 96MHz - AT91C_BASE_PMC->PMC_PLLR = - PMC_PLL_DIVISOR(2) | - //PMC_PLL_COUNT_BEFORE_LOCK(0x10) | - PMC_PLL_COUNT_BEFORE_LOCK(0x3F) | - PMC_PLL_FREQUENCY_RANGE(0) | - PMC_PLL_MULTIPLIER(12) | - PMC_PLL_USB_DIVISOR(1); - - // wait for PLL to lock - while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK)) {}; - - // we want a master clock (MCK) to be PLL clock / 2 = 96MHz / 2 = 48MHz - // datasheet recommends that this register is programmed in two operations - // when changing to PLL, program the prescaler first then the source - AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2; - - // wait for main clock ready signal - while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY)) {}; - - // set the source to PLL - AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2 | AT91C_PMC_CSS_PLL_CLK; - - // wait for main clock ready signal - while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY)) {}; + mck_from_slck_to_pll(true); } static void Fatal(void) { diff --git a/client/cmdhw.c b/client/cmdhw.c index 5dddac5fc..ec53ad2cf 100644 --- a/client/cmdhw.c +++ b/client/cmdhw.c @@ -511,6 +511,18 @@ static int CmdStatus(const char *Cmd) { return PM3_SUCCESS; } +static int CmdTia(const char *Cmd) { + (void)Cmd; // Cmd is not used so far + clearCommandBuffer(); + PrintAndLogEx(INFO, "Triggering new Timing Interval Acquisition..."); + PacketResponseNG resp; + SendCommandNG(CMD_TIA, NULL, 0); + if (WaitForResponseTimeout(CMD_TIA, &resp, 2000) == false) + PrintAndLogEx(WARNING, "Tia command failed. You probably need to unplug the Proxmark3."); + PrintAndLogEx(INFO, "TIA done."); + return PM3_SUCCESS; +} + static int CmdPing(const char *Cmd) { uint32_t len = strtol(Cmd, NULL, 0); if (len > PM3_CMD_DATA_SIZE) @@ -604,6 +616,7 @@ static command_t CommandTable[] = { {"setmux", CmdSetMux, IfPm3Present, "Set the ADC mux to a specific value"}, {"standalone", CmdStandalone, IfPm3Present, "Jump to the standalone mode"}, {"status", CmdStatus, IfPm3Present, "Show runtime status information about the connected Proxmark3"}, + {"tia", CmdTia, IfPm3Present, "Trigger a Timing Interval Acquisition to re-adjust the RealTimeCounter divider"}, {"tune", CmdTune, IfPm3Present, "Measure antenna tuning"}, {"version", CmdVersion, IfPm3Present, "Show version information about the connected Proxmark3"}, {NULL, NULL, NULL, NULL} diff --git a/common_arm/clocks.c b/common_arm/clocks.c new file mode 100644 index 000000000..a4c2d6ced --- /dev/null +++ b/common_arm/clocks.c @@ -0,0 +1,62 @@ +#include "clocks.h" +#include "proxmark3_arm.h" + +void mck_from_pll_to_slck(void) { + // switch main clk to slow clk, first CSS then PRES + AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2 | AT91C_PMC_CSS_SLOW_CLK; + while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY)) {}; + AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK | AT91C_PMC_CSS_SLOW_CLK; + while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY)) {}; + + // disable the PLL + AT91C_BASE_PMC->PMC_PLLR = 0x0; + + // disable main oscillator + AT91C_BASE_PMC->PMC_MOR = 0; +} + +void mck_from_slck_to_pll(bool cold) { + // worst case scenario, with MAINCK = 16MHz xtal, startup delay is 1.4ms + // if SLCK slow clock runs at its worst case (max) frequency of 42kHz + // max startup delay = (1.4ms*42k)/8 = 7.356 so round up to 8 + + // enable main oscillator and set startup delay if cold boot + if (cold) { + AT91C_BASE_PMC->PMC_MOR = + AT91C_CKGR_MOSCEN | + PMC_MAIN_OSC_STARTUP_DELAY(8); + } else { + AT91C_BASE_PMC->PMC_MOR = AT91C_CKGR_MOSCEN; + } + + // wait for main oscillator to stabilize + while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS)) {}; + + // PLL output clock frequency in range 80 - 160 MHz needs CKGR_PLL = 00 + // PLL output clock frequency in range 150 - 180 MHz needs CKGR_PLL = 10 + // PLL output is MAINCK * multiplier / divisor = 16MHz * 12 / 2 = 96MHz + AT91C_BASE_PMC->PMC_PLLR = + PMC_PLL_DIVISOR(2) | + //PMC_PLL_COUNT_BEFORE_LOCK(0x10) | + PMC_PLL_COUNT_BEFORE_LOCK(0x3F) | + PMC_PLL_FREQUENCY_RANGE(0) | + PMC_PLL_MULTIPLIER(12) | + PMC_PLL_USB_DIVISOR(1); + + // wait for PLL to lock + while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK)) {}; + + // we want a master clock (MCK) to be PLL clock / 2 = 96MHz / 2 = 48MHz + // datasheet recommends that this register is programmed in two operations + // when changing to PLL, program the prescaler first then the source + AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2 | AT91C_PMC_CSS_SLOW_CLK; + + // wait for main clock ready signal + while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY)) {}; + + // set the source to PLL + AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2 | AT91C_PMC_CSS_PLL_CLK; + + // wait for main clock ready signal + while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY)) {}; +} diff --git a/common_arm/clocks.h b/common_arm/clocks.h new file mode 100644 index 000000000..8359dad27 --- /dev/null +++ b/common_arm/clocks.h @@ -0,0 +1,10 @@ +#ifndef _CLOCKS_H_ +#define _CLOCKS_H_ + +#include "common.h" +#include "at91sam7s512.h" + +void mck_from_pll_to_slck(void); +void mck_from_slck_to_pll(bool cold); + +#endif // _CLOCKS_H_ diff --git a/include/pm3_cmd.h b/include/pm3_cmd.h index c92a1faee..19ef27afb 100644 --- a/include/pm3_cmd.h +++ b/include/pm3_cmd.h @@ -287,6 +287,7 @@ typedef struct { #define CMD_SET_DBGMODE 0x0114 #define CMD_STANDALONE 0x0115 #define CMD_WTX 0x0116 +#define CMD_TIA 0x0117 // RDV40, Flash memory operations #define CMD_FLASHMEM_WRITE 0x0121 From 0877802dedca90b6dd741411c3a9965b0084019e Mon Sep 17 00:00:00 2001 From: Philippe Teuwen Date: Tue, 15 Oct 2019 18:02:19 +0200 Subject: [PATCH 06/11] Bumping PMC_MAIN_OSC_STARTUP_DELAY to solve slow clock on some devices, thanks @iceman1001! --- common_arm/clocks.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/common_arm/clocks.c b/common_arm/clocks.c index a4c2d6ced..3499b73d0 100644 --- a/common_arm/clocks.c +++ b/common_arm/clocks.c @@ -19,12 +19,15 @@ void mck_from_slck_to_pll(bool cold) { // worst case scenario, with MAINCK = 16MHz xtal, startup delay is 1.4ms // if SLCK slow clock runs at its worst case (max) frequency of 42kHz // max startup delay = (1.4ms*42k)/8 = 7.356 so round up to 8 + // UPDATE: + // we observed on 10% of the devices very wrong initial slow clock RC TIA measures. + // Bumping delay to 16 helps fixing the issue even on the most screwed RC. // enable main oscillator and set startup delay if cold boot if (cold) { AT91C_BASE_PMC->PMC_MOR = AT91C_CKGR_MOSCEN | - PMC_MAIN_OSC_STARTUP_DELAY(8); + PMC_MAIN_OSC_STARTUP_DELAY(16); } else { AT91C_BASE_PMC->PMC_MOR = AT91C_CKGR_MOSCEN; } From bf3ae7f00732873a893670fa6d7047eabb820da5 Mon Sep 17 00:00:00 2001 From: Philippe Teuwen Date: Tue, 15 Oct 2019 18:07:24 +0200 Subject: [PATCH 07/11] perform startup delay also during TIA --- armsrc/appmain.c | 2 +- bootrom/bootrom.c | 2 +- common_arm/clocks.c | 14 +++++--------- common_arm/clocks.h | 2 +- 4 files changed, 8 insertions(+), 12 deletions(-) diff --git a/armsrc/appmain.c b/armsrc/appmain.c index f2e4424ee..d75d00c14 100644 --- a/armsrc/appmain.c +++ b/armsrc/appmain.c @@ -307,7 +307,7 @@ void SendVersion(void) { void TimingIntervalAcquisition(void) { // trigger new acquisition by turning main oscillator off and on mck_from_pll_to_slck(); - mck_from_slck_to_pll(false); + mck_from_slck_to_pll(); // wait for MCFR and recompute RTMR scaler StartTickCount(); } diff --git a/bootrom/bootrom.c b/bootrom/bootrom.c index 081a49c24..aa633f448 100644 --- a/bootrom/bootrom.c +++ b/bootrom/bootrom.c @@ -69,7 +69,7 @@ static void ConfigClocks(void) { (1 << AT91C_ID_PWMC) | (1 << AT91C_ID_UDP); - mck_from_slck_to_pll(true); + mck_from_slck_to_pll(); } static void Fatal(void) { diff --git a/common_arm/clocks.c b/common_arm/clocks.c index 3499b73d0..c6fa874d3 100644 --- a/common_arm/clocks.c +++ b/common_arm/clocks.c @@ -15,7 +15,7 @@ void mck_from_pll_to_slck(void) { AT91C_BASE_PMC->PMC_MOR = 0; } -void mck_from_slck_to_pll(bool cold) { +void mck_from_slck_to_pll(void) { // worst case scenario, with MAINCK = 16MHz xtal, startup delay is 1.4ms // if SLCK slow clock runs at its worst case (max) frequency of 42kHz // max startup delay = (1.4ms*42k)/8 = 7.356 so round up to 8 @@ -23,14 +23,10 @@ void mck_from_slck_to_pll(bool cold) { // we observed on 10% of the devices very wrong initial slow clock RC TIA measures. // Bumping delay to 16 helps fixing the issue even on the most screwed RC. - // enable main oscillator and set startup delay if cold boot - if (cold) { - AT91C_BASE_PMC->PMC_MOR = - AT91C_CKGR_MOSCEN | - PMC_MAIN_OSC_STARTUP_DELAY(16); - } else { - AT91C_BASE_PMC->PMC_MOR = AT91C_CKGR_MOSCEN; - } + // enable main oscillator and set startup delay + AT91C_BASE_PMC->PMC_MOR = + AT91C_CKGR_MOSCEN | + PMC_MAIN_OSC_STARTUP_DELAY(16); // wait for main oscillator to stabilize while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS)) {}; diff --git a/common_arm/clocks.h b/common_arm/clocks.h index 8359dad27..1752ba4fd 100644 --- a/common_arm/clocks.h +++ b/common_arm/clocks.h @@ -5,6 +5,6 @@ #include "at91sam7s512.h" void mck_from_pll_to_slck(void); -void mck_from_slck_to_pll(bool cold); +void mck_from_slck_to_pll(void); #endif // _CLOCKS_H_ From f9157c946d544de79c444c8b390cf24514db00ed Mon Sep 17 00:00:00 2001 From: Philippe Teuwen Date: Tue, 15 Oct 2019 18:53:29 +0200 Subject: [PATCH 08/11] SLCK detection: use more available SpinDelay --- armsrc/appmain.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/armsrc/appmain.c b/armsrc/appmain.c index d75d00c14..e70b03cf8 100644 --- a/armsrc/appmain.c +++ b/armsrc/appmain.c @@ -366,7 +366,7 @@ void SendStatus(void) { uint32_t delta_time = 0; uint32_t start_time = GetTickCount(); #define SLCK_CHECK_MS 50 - WaitMS(SLCK_CHECK_MS); + SpinDelay(SLCK_CHECK_MS); delta_time = GetTickCountDelta(start_time); if ((delta_time < SLCK_CHECK_MS - 1) || (delta_time > SLCK_CHECK_MS + 1)) { // error > 2% with SLCK_CHECK_MS=50 From 8ea04a42a6bd9ae6a1e02310d009e3f6d5dec056 Mon Sep 17 00:00:00 2001 From: Philippe Teuwen Date: Wed, 16 Oct 2019 00:03:53 +0200 Subject: [PATCH 09/11] Use GetTickCountDelta when possible --- armsrc/iso14443a.c | 4 ++-- armsrc/mifaresim.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/armsrc/iso14443a.c b/armsrc/iso14443a.c index db347cf13..38eb2ecb6 100644 --- a/armsrc/iso14443a.c +++ b/armsrc/iso14443a.c @@ -2044,7 +2044,7 @@ bool GetIso14443aAnswerFromTag_Thinfilm(uint8_t *receivedResponse, uint8_t *rec } } - if (GetTickCount() - receive_timer > 100) + if (GetTickCountDelta(receive_timer) > 100) break; } *received_len = Demod.len; @@ -2094,7 +2094,7 @@ static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receive } // timeout already in ms + 100ms guard time - if (GetTickCount() - receive_timer > timeout + 100) + if (GetTickCountDelta(receive_timer) > timeout + 100) break; } return false; diff --git a/armsrc/mifaresim.c b/armsrc/mifaresim.c index 0f912c083..cdd8b556d 100644 --- a/armsrc/mifaresim.c +++ b/armsrc/mifaresim.c @@ -1106,7 +1106,7 @@ void Mifare1ksim(uint16_t flags, uint8_t exitAfterNReads, uint8_t *datain, uint1 Dbprintf("[MFEMUL_AUTH1] AUTH COMPLETED for sector %d with key %c. time=%d", cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B', - GetTickCount() - authTimer + GetTickCountDelta(authTimer) ); } LED_C_ON(); From 260f6b9c2fc6765c9fb6447bbef39b6631eed970 Mon Sep 17 00:00:00 2001 From: Iceman Date: Wed, 16 Oct 2019 10:04:38 +0200 Subject: [PATCH 10/11] Update Troubleshooting.md --- doc/md/Installation_Instructions/Troubleshooting.md | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/doc/md/Installation_Instructions/Troubleshooting.md b/doc/md/Installation_Instructions/Troubleshooting.md index e0cf7f7aa..ab893d177 100644 --- a/doc/md/Installation_Instructions/Troubleshooting.md +++ b/doc/md/Installation_Instructions/Troubleshooting.md @@ -16,7 +16,8 @@ Always use the latest repository commits from *master* branch. There are always * [Troubles with SIM card reader](#troubles-with-sim-card-reader) * [Troubles with t5577 commands or MFC/iClass/T55x7 dictionaries](#troubles-with-t5577-commands-or-mfciclasst55x7-dictionaries) * [File not found](#file-not-found) - * [pixmap / pixbuf warnings](#pixmap--pixbuf-warnings) + * [Pixmap / pixbuf warnings](#pixmap--pixbuf-warnings) + * [Usb cable](#usb-cable) ## `pm3` or `pm3-flash*` doesn't see my Proxmark @@ -154,6 +155,12 @@ pm3 --> sc upgrade f ../tools/simmodule/sim011.bin etc. -## pixmap / pixbuf warnings +## Pixmap / pixbuf warnings If you get warnings related to pixmap or pixbuf such as *Pixbuf theme: Cannot load pixmap file* or *Invalid borders specified for theme pixmap*, it's a problem of your Theme, try another one and the problem should vanish. See e.g. [#354](https://github.com/RfidResearchGroup/proxmark3/issues/354) (Yaru theme on Ubuntu) and [#386](https://github.com/RfidResearchGroup/proxmark3/issues/386) (Kali-X theme on Kali). + +## Usb cable + +It's needed to have a good USB cable to connect Proxmark3 to USB. If you have stability problems (Proxmark3 resets, firmware hangs, especially firmware hangs just after start, etc.) + +- check your cable with a USB tester (or try to change it). It needs to have a resistance smaller or equal to 0.3 Ohm. From 8a91880e332085b60c99af1b147ca477170383d8 Mon Sep 17 00:00:00 2001 From: Iceman Date: Wed, 16 Oct 2019 10:05:21 +0200 Subject: [PATCH 11/11] Update README.md --- README.md | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/README.md b/README.md index 62c3add53..350763c34 100644 --- a/README.md +++ b/README.md @@ -56,6 +56,8 @@ This repo compiles nicely on - WSL, WSL2 (Windows subsystem linux) on Windows 10 - Docker container +The [public roadmap](https://github.com/RfidResearchGroup/proxmark3/wiki/Public-Roadmap) is an excellent start to read if you are interesting in contributing. + > 👉 **Remember!** If you intend to contribute to the code, please read the [coding style notes](HACKING.md) first. We usually merge your contributions fast since we do like the idea of getting a functionality in the Proxmark3 and weed out the bugs afterwards. @@ -93,7 +95,8 @@ The new universal GUI will work. [Proxmark3 Universal GUI](https://github.com/bu Please see the [Proxmark Forum](http://www.proxmark.org/forum/index.php) and see if your issue is listed in the first instance Google is your friend :) Questions will be answered via the forum by Iceman and the team. -It's needed to have a good USB cable to connect Proxmark3 to USB. If you have stability problems (Proxmark3 resets, firmware hangs, especially firmware hangs just after start, etc.) - check your cable with a USB tester (or try to change it). It needs to have a resistance smaller or equal to 0.3 Ohm. +Read the [Troubleshooting](/doc/md/Installation_Instructions/Troubleshooting.md) guide to weed out most known problems. + ## The end