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3 changed files with 9 additions and 6 deletions
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@ -145,7 +145,7 @@ void FpgaSetupSscExt(uint8_t clearPCER) {
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// clock comes from TK pin, no clock output, outputs change on falling
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// edge of TK, sample on rising edge of TK, start on positive-going edge of sync
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AT91C_BASE_SSC->SSC_TCMR = SSC_CLOCK_MODE_SELECT(2) | SSC_CLOCK_MODE_START(5);
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AT91C_BASE_SSC->SSC_TCMR = SSC_CLOCK_MODE_SELECT(2) | SSC_CLOCK_MODE_START(5);
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// tx framing is the same as the rx framing
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AT91C_BASE_SSC->SSC_TFMR = AT91C_BASE_SSC->SSC_RFMR;
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@ -1127,11 +1127,14 @@ void SimulateIClass(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain
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LEDsoff();
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FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
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// this will clear out bigbuf memory, the eload command must select this before!
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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FpgaSetupSsc();
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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FpgaSetupSsc();
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// Enable and clear the trace
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clear_trace();
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set_tracing(true);
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@ -1799,9 +1802,9 @@ void setupIclassReader() {
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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FpgaSetupSsc();
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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FpgaSetupSsc();
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// Reset trace buffer
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clear_trace();
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@ -950,7 +950,7 @@ void ReaderIso15693(uint32_t parameter) {
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// all demodulation performed in arm rather than host. - greg
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void SimTagIso15693(uint32_t parameter, uint8_t *uid) {
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
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FpgaSetupSsc();
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// Start from off (no field generated)
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