diff --git a/common_arm/clocks.c b/common_arm/clocks.c
index a4c2d6ced..3499b73d0 100644
--- a/common_arm/clocks.c
+++ b/common_arm/clocks.c
@@ -19,12 +19,15 @@ void mck_from_slck_to_pll(bool cold) {
     // worst case scenario, with MAINCK = 16MHz xtal, startup delay is 1.4ms
     // if SLCK slow clock runs at its worst case (max) frequency of 42kHz
     // max startup delay = (1.4ms*42k)/8 = 7.356 so round up to 8
+    // UPDATE:
+    // we observed on 10% of the devices very wrong initial slow clock RC TIA measures.
+    // Bumping delay to 16 helps fixing the issue even on the most screwed RC.
 
     // enable main oscillator and set startup delay if cold boot
     if (cold) {
         AT91C_BASE_PMC->PMC_MOR =
             AT91C_CKGR_MOSCEN |
-            PMC_MAIN_OSC_STARTUP_DELAY(8);
+            PMC_MAIN_OSC_STARTUP_DELAY(16);
     } else {
         AT91C_BASE_PMC->PMC_MOR = AT91C_CKGR_MOSCEN;
     }