mirror of
https://github.com/RfidResearchGroup/proxmark3.git
synced 2025-08-21 05:43:48 -07:00
make style
This commit is contained in:
Philippe Teuwen
parent
0d9223a547
commit
0373696662
483 changed files with 56514 additions and 52451 deletions
194
armsrc/felica.c
194
armsrc/felica.c
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@ -31,23 +31,25 @@ static uint32_t felica_lasttime_prox2air_start;
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static void iso18092_setup(uint8_t fpga_minor_mode);
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static uint8_t felica_select_card(felica_card_select_t *card);
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static void TransmitFor18092_AsReader(uint8_t * frame, int len, uint32_t *timing, uint8_t power, uint8_t highspeed);
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static void TransmitFor18092_AsReader(uint8_t *frame, int len, uint32_t *timing, uint8_t power, uint8_t highspeed);
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bool WaitForFelicaReply(uint16_t maxbytes);
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void iso18092_set_timeout(uint32_t timeout) {
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felica_timeout = timeout + (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/(16*8) + 2;
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void iso18092_set_timeout(uint32_t timeout)
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{
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felica_timeout = timeout + (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER) / (16 * 8) + 2;
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}
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uint32_t iso18092_get_timeout(void) {
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return felica_timeout - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/(16*8) - 2;
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uint32_t iso18092_get_timeout(void)
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{
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return felica_timeout - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER) / (16 * 8) - 2;
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}
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#ifndef FELICA_MAX_FRAME_SIZE
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#define FELICA_MAX_FRAME_SIZE 260
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#define FELICA_MAX_FRAME_SIZE 260
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#endif
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//structure to hold outgoing NFC frame
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static uint8_t frameSpace[FELICA_MAX_FRAME_SIZE+4];
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static uint8_t frameSpace[FELICA_MAX_FRAME_SIZE + 4];
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//structure to hold incoming NFC frame, used for ISO/IEC 18092-compatible frames
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static struct {
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@ -67,8 +69,8 @@ static struct {
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uint16_t len;
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uint8_t byte_offset;
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uint8_t *framebytes;
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//should be enough. maxlen is 255, 254 for data, 2 for sync, 2 for crc
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// 0,1 -> SYNC, 2 - len, 3-(len+1)->data, then crc
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//should be enough. maxlen is 255, 254 for data, 2 for sync, 2 for crc
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// 0,1 -> SYNC, 2 - len, 3-(len+1)->data, then crc
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} FelicaFrame;
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//b2 4d is SYNC, 45645 in 16-bit notation, 10110010 01001101 binary. Frame will not start filling until this is shifted in
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@ -77,33 +79,37 @@ static struct {
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# define SYNC_16BIT 0xB24D
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#endif
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static void FelicaFrameReset() {
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static void FelicaFrameReset()
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{
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FelicaFrame.state = STATE_UNSYNCD;
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FelicaFrame.posCnt = 0;
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FelicaFrame.crc_ok = false;
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FelicaFrame.byte_offset = 0;
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}
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static void FelicaFrameinit(uint8_t *data) {
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static void FelicaFrameinit(uint8_t *data)
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{
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FelicaFrame.framebytes = data;
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FelicaFrameReset();
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}
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//shift byte into frame, reversing it at the same time
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static void shiftInByte(uint8_t bt) {
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static void shiftInByte(uint8_t bt)
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{
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uint8_t j;
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for(j=0; j < FelicaFrame.byte_offset; j++) {
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FelicaFrame.framebytes[FelicaFrame.posCnt] = ( FelicaFrame.framebytes[FelicaFrame.posCnt]<<1 ) + (bt & 1);
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for (j = 0; j < FelicaFrame.byte_offset; j++) {
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FelicaFrame.framebytes[FelicaFrame.posCnt] = (FelicaFrame.framebytes[FelicaFrame.posCnt] << 1) + (bt & 1);
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bt >>= 1;
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}
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FelicaFrame.posCnt++;
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FelicaFrame.rem_len--;
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for(j = FelicaFrame.byte_offset; j<8; j++) {
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FelicaFrame.framebytes[FelicaFrame.posCnt] = (FelicaFrame.framebytes[FelicaFrame.posCnt]<<1 ) + (bt & 1);
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for (j = FelicaFrame.byte_offset; j < 8; j++) {
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FelicaFrame.framebytes[FelicaFrame.posCnt] = (FelicaFrame.framebytes[FelicaFrame.posCnt] << 1) + (bt & 1);
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bt >>= 1;
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}
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}
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static void Process18092Byte(uint8_t bt) {
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static void Process18092Byte(uint8_t bt)
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{
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switch (FelicaFrame.state) {
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case STATE_UNSYNCD: {
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//almost any nonzero byte can be start of SYNC. SYNC should be preceded by zeros, but that is not alsways the case
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@ -119,7 +125,7 @@ static void Process18092Byte(uint8_t bt) {
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FelicaFrame.shiftReg = bt;
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FelicaFrame.state = STATE_UNSYNCD;
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} else {
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for (uint8_t i=0; i<8; i++) {
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for (uint8_t i = 0; i < 8; i++) {
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if (FelicaFrame.shiftReg == SYNC_16BIT) {
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//SYNC done!
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@ -128,13 +134,13 @@ static void Process18092Byte(uint8_t bt) {
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FelicaFrame.framebytes[1] = 0x4d;
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FelicaFrame.byte_offset = i;
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//shift in remaining byte, slowly...
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for(uint8_t j=i; j<8; j++) {
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for (uint8_t j = i; j < 8; j++) {
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FelicaFrame.framebytes[2] = (FelicaFrame.framebytes[2] << 1) + (bt & 1);
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bt >>= 1;
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}
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FelicaFrame.posCnt = 2;
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if (i==0)
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if (i == 0)
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break;
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}
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FelicaFrame.shiftReg = (FelicaFrame.shiftReg << 1) + (bt & 1);
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@ -171,12 +177,12 @@ static void Process18092Byte(uint8_t bt) {
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case STATE_GET_CRC: {
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shiftInByte(bt);
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if ( FelicaFrame.rem_len <= 0 ) {
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if (FelicaFrame.rem_len <= 0) {
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// skip sync 2bytes. IF ok, residue should be 0x0000
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FelicaFrame.crc_ok = check_crc(CRC_FELICA, FelicaFrame.framebytes+2, FelicaFrame.len-2);
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FelicaFrame.crc_ok = check_crc(CRC_FELICA, FelicaFrame.framebytes + 2, FelicaFrame.len - 2);
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FelicaFrame.state = STATE_FULL;
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FelicaFrame.rem_len = 0;
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if (MF_DBGLEVEL > 3) Dbprintf("[+] got 2 crc bytes [%s]", (FelicaFrame.crc_ok) ? "OK" : "No" );
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if (MF_DBGLEVEL > 3) Dbprintf("[+] got 2 crc bytes [%s]", (FelicaFrame.crc_ok) ? "OK" : "No");
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}
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break;
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}
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@ -190,7 +196,8 @@ static void Process18092Byte(uint8_t bt) {
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* Currently does NOT do any collision handling.
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* It expects 0-1 cards in the device's range.
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*/
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static uint8_t felica_select_card(felica_card_select_t *card) {
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static uint8_t felica_select_card(felica_card_select_t *card)
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{
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// POLL command
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// 0xB2 0x4B = sync code
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@ -205,7 +212,7 @@ static uint8_t felica_select_card(felica_card_select_t *card) {
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// b0 = fc/64 (212kbps)
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// 0x00 = timeslot
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// 0x09 0x21 = crc
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static uint8_t poll[10] = {0xb2,0x4d,0x06,FELICA_POLL_REQ,0xFF,0xFF,0x00,0x00,0x09,0x21};
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static uint8_t poll[10] = {0xb2, 0x4d, 0x06, FELICA_POLL_REQ, 0xFF, 0xFF, 0x00, 0x00, 0x09, 0x21};
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int len = 20;
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@ -225,7 +232,7 @@ static uint8_t felica_select_card(felica_card_select_t *card) {
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} while (--len);
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// timed-out
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if ( len == 0 )
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if (len == 0)
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return 1;
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// wrong answer
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@ -233,7 +240,7 @@ static uint8_t felica_select_card(felica_card_select_t *card) {
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return 2;
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// VALIDATE CRC residue is 0, hence if crc is a value it failed.
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if (!check_crc(CRC_FELICA, FelicaFrame.framebytes+2, FelicaFrame.len-2))
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if (!check_crc(CRC_FELICA, FelicaFrame.framebytes + 2, FelicaFrame.len - 2))
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return 3;
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// copy UID
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@ -245,7 +252,7 @@ static uint8_t felica_select_card(felica_card_select_t *card) {
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memcpy(card->code, card->IDm, 2);
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memcpy(card->uid, card->IDm + 2, 6);
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memcpy(card->iccode, card->PMm, 2);
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memcpy(card->mrt, card->PMm+2, 6);
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memcpy(card->mrt, card->PMm + 2, 6);
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}
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// more status bytes?
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@ -264,7 +271,8 @@ static uint8_t felica_select_card(felica_card_select_t *card) {
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// Felica standard has a different file system, AFAIK,
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// 8-byte IDm, number of blocks, blocks numbers
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// number of blocks limited to 4 for FelicaLite(S)
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static void BuildFliteRdblk(uint8_t* idm, int blocknum, uint16_t *blocks ) {
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static void BuildFliteRdblk(uint8_t *idm, int blocknum, uint16_t *blocks)
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{
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if (blocknum > 4 || blocknum <= 0)
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Dbprintf("Invalid number of blocks, %d != 4", blocknum);
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@ -298,13 +306,13 @@ static void BuildFliteRdblk(uint8_t* idm, int blocknum, uint16_t *blocks ) {
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//number of blocks
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frameSpace[c++] = blocknum;
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for (i=0; i < blocknum; i++) {
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for (i = 0; i < blocknum; i++) {
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//3-byte block
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if (blocks[i] >= 256) {
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frameSpace[c++] = 0x00;
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frameSpace[c++] = (blocks[i] >> 8); //block number, little endian....
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frameSpace[c++] = (blocks[i] & 0xff);
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frameSpace[c++] = 0x00;
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frameSpace[c++] = (blocks[i] >> 8); //block number, little endian....
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frameSpace[c++] = (blocks[i] & 0xff);
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} else {
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frameSpace[c++] = 0x80;
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frameSpace[c++] = blocks[i];
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@ -312,15 +320,16 @@ static void BuildFliteRdblk(uint8_t* idm, int blocknum, uint16_t *blocks ) {
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}
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//set length
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frameSpace[2] = c-2;
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AddCrc(frameSpace, c-2);
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frameSpace[2] = c - 2;
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AddCrc(frameSpace, c - 2);
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}
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static void TransmitFor18092_AsReader(uint8_t * frame, int len, uint32_t *timing, uint8_t power, uint8_t highspeed) {
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static void TransmitFor18092_AsReader(uint8_t *frame, int len, uint32_t *timing, uint8_t power, uint8_t highspeed)
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{
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uint8_t flags = FPGA_MAJOR_MODE_ISO18092;
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if ( power )
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if (power)
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flags |= FPGA_HF_ISO18092_FLAG_READER;
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if (highspeed)
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flags |= FPGA_HF_ISO18092_FLAG_424K;
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@ -356,31 +365,32 @@ static void TransmitFor18092_AsReader(uint8_t * frame, int len, uint32_t *timing
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}
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}
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/**/
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/**/
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while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) {};
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AT91C_BASE_SSC->SSC_THR = 0x00; //minimum delay
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while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) {};
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AT91C_BASE_SSC->SSC_THR = 0x00; //spin
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/**/
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/**/
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// log
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LogTrace(
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frame,
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len,
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(felica_lasttime_prox2air_start<<4) + DELAY_ARM2AIR_AS_READER,
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((felica_lasttime_prox2air_start + felica_lasttime_prox2air_start)<<4) + DELAY_ARM2AIR_AS_READER,
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(felica_lasttime_prox2air_start << 4) + DELAY_ARM2AIR_AS_READER,
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((felica_lasttime_prox2air_start + felica_lasttime_prox2air_start) << 4) + DELAY_ARM2AIR_AS_READER,
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NULL,
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true
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);
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felica_nexttransfertime = MAX(felica_nexttransfertime ,felica_lasttime_prox2air_start + FELICA_REQUEST_GUARD_TIME);
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felica_nexttransfertime = MAX(felica_nexttransfertime, felica_lasttime_prox2air_start + FELICA_REQUEST_GUARD_TIME);
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}
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// Wait for tag reply
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// stop when button is pressed
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// or return TRUE when command is captured
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bool WaitForFelicaReply(uint16_t maxbytes) {
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bool WaitForFelicaReply(uint16_t maxbytes)
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{
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uint32_t c = 0;
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@ -393,7 +403,7 @@ bool WaitForFelicaReply(uint16_t maxbytes) {
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uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
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uint32_t timeout = iso18092_get_timeout();
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for(;;) {
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for (;;) {
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WDT_HIT();
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if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
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@ -403,15 +413,15 @@ bool WaitForFelicaReply(uint16_t maxbytes) {
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felica_nexttransfertime =
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MAX(
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felica_nexttransfertime,
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(GetCountSspClk() & 0xfffffff8) - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FELICA_FRAME_DELAY_TIME
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(GetCountSspClk() & 0xfffffff8) - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER) / 16 + FELICA_FRAME_DELAY_TIME
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)
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;
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;
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LogTrace(
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FelicaFrame.framebytes,
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FelicaFrame.len,
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((GetCountSspClk() & 0xfffffff8)<<4) - DELAY_AIR2ARM_AS_READER - timeout,
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((GetCountSspClk() & 0xfffffff8)<<4) - DELAY_AIR2ARM_AS_READER,
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((GetCountSspClk() & 0xfffffff8) << 4) - DELAY_AIR2ARM_AS_READER - timeout,
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((GetCountSspClk() & 0xfffffff8) << 4) - DELAY_AIR2ARM_AS_READER,
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NULL,
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false
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);
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@ -430,13 +440,15 @@ bool WaitForFelicaReply(uint16_t maxbytes) {
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// Set up FeliCa communication (similar to iso14443a_setup)
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// field is setup for "Sending as Reader"
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static void iso18092_setup(uint8_t fpga_minor_mode) {
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static void iso18092_setup(uint8_t fpga_minor_mode)
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{
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LEDsoff();
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FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
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// allocate command receive buffer
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BigBuf_free(); BigBuf_Clear_ext(false);
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BigBuf_free();
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BigBuf_Clear_ext(false);
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// Initialize Demod and Uart structs
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//DemodInit(BigBuf_malloc(MAX_FRAME_SIZE));
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@ -473,7 +485,8 @@ static void iso18092_setup(uint8_t fpga_minor_mode) {
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// arg0 FeliCa flags
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// arg1 len of commandbytes
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// d.asBytes command bytes to send
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void felica_sendraw(UsbCommand *c) {
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void felica_sendraw(UsbCommand *c)
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{
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if (MF_DBGLEVEL > 3) Dbprintf("FeliCa_sendraw Enter");
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@ -494,10 +507,10 @@ void felica_sendraw(UsbCommand *c) {
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// notify client selecting status.
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// if failed selecting, turn off antenna and quite.
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if( !(param & FELICA_NO_SELECT) ) {
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if (!(param & FELICA_NO_SELECT)) {
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arg0 = felica_select_card(&card);
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cmd_send(CMD_ACK, arg0, sizeof(card.uid), 0, &card, sizeof(felica_card_select_t));
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if ( arg0 > 0 )
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if (arg0 > 0)
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goto OUT;
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}
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}
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@ -505,26 +518,26 @@ void felica_sendraw(UsbCommand *c) {
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if ((param & FELICA_RAW)) {
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// 2 sync, 1 len, 2crc == 5
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uint8_t *buf = BigBuf_malloc(len+5);
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uint8_t *buf = BigBuf_malloc(len + 5);
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// add sync bits
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buf[0] = 0xb2;
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buf[1] = 0x4d;
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buf[2] = len;
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// copy command
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memcpy(buf+2, cmd, len);
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memcpy(buf + 2, cmd, len);
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if ((param & FELICA_APPEND_CRC)) {
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// Don't append crc on empty bytearray...
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if ( len > 0 ) {
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if (len > 0) {
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AddCrc(buf, len);
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len += 2;
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}
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}
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TransmitFor18092_AsReader(buf, buf[2]+4, NULL, 1, 0);
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TransmitFor18092_AsReader(buf, buf[2] + 4, NULL, 1, 0);
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arg0 = !WaitForFelicaReply(1024);
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cmd_send(CMD_ACK, arg0, 0, 0, FelicaFrame.framebytes+2, FelicaFrame.len-2);
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cmd_send(CMD_ACK, arg0, 0, 0, FelicaFrame.framebytes + 2, FelicaFrame.len - 2);
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}
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if ((param & FELICA_NO_DISCONNECT))
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@ -539,25 +552,26 @@ OUT:
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if (MF_DBGLEVEL > 3) Dbprintf("FeliCa_sendraw Exit");
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}
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void felica_sniff(uint32_t samplesToSkip, uint32_t triggersToSkip) {
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void felica_sniff(uint32_t samplesToSkip, uint32_t triggersToSkip)
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{
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int remFrames = (samplesToSkip) ? samplesToSkip : 0;
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|
||||
Dbprintf("Snoop FelicaLiteS: Getting first %d frames, Skipping %d triggers.\n", samplesToSkip, triggersToSkip);
|
||||
|
||||
iso18092_setup( FPGA_HF_ISO18092_FLAG_NOMOD);
|
||||
iso18092_setup(FPGA_HF_ISO18092_FLAG_NOMOD);
|
||||
|
||||
//the frame bits are slow enough.
|
||||
int n = BigBuf_max_traceLen() / sizeof(uint8_t); // take all memory
|
||||
int numbts = 0;
|
||||
uint8_t *dest = (uint8_t *)BigBuf_get_addr();
|
||||
uint8_t *destend = dest + n-2;
|
||||
uint8_t *destend = dest + n - 2;
|
||||
|
||||
uint32_t endframe = GetCountSspClk();
|
||||
|
||||
while (dest <= destend) {
|
||||
WDT_HIT();
|
||||
if( BUTTON_PRESS()) break;
|
||||
if (BUTTON_PRESS()) break;
|
||||
|
||||
if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
|
||||
uint8_t dist = (uint8_t)(AT91C_BASE_SSC->SSC_RHR);
|
||||
|
|
@ -566,7 +580,7 @@ void felica_sniff(uint32_t samplesToSkip, uint32_t triggersToSkip) {
|
|||
//to be sure we are in frame
|
||||
if (FelicaFrame.state == STATE_GET_LENGTH) {
|
||||
//length is after 48 (PRE)+16 (SYNC) - 64 ticks +maybe offset? not 100%
|
||||
uint16_t distance = GetCountSspClk() - endframe - 64 + (FelicaFrame.byte_offset > 0 ? (8-FelicaFrame.byte_offset) : 0);
|
||||
uint16_t distance = GetCountSspClk() - endframe - 64 + (FelicaFrame.byte_offset > 0 ? (8 - FelicaFrame.byte_offset) : 0);
|
||||
*dest = distance >> 8;
|
||||
dest++;
|
||||
*dest = (distance & 0xff);
|
||||
|
|
@ -577,16 +591,16 @@ void felica_sniff(uint32_t samplesToSkip, uint32_t triggersToSkip) {
|
|||
endframe = GetCountSspClk();
|
||||
//*dest = FelicaFrame.crc_ok; //kind of wasteful
|
||||
dest++;
|
||||
for(int i=0; i < FelicaFrame.len; i++) {
|
||||
for (int i = 0; i < FelicaFrame.len; i++) {
|
||||
*dest = FelicaFrame.framebytes[i];
|
||||
dest++;
|
||||
if (dest >= destend ) break;
|
||||
if (dest >= destend) break;
|
||||
|
||||
}
|
||||
|
||||
remFrames--;
|
||||
if (remFrames <= 0) break;
|
||||
if (dest >= destend ) break;
|
||||
if (dest >= destend) break;
|
||||
|
||||
numbts += FelicaFrame.len;
|
||||
|
||||
|
|
@ -602,7 +616,7 @@ void felica_sniff(uint32_t samplesToSkip, uint32_t triggersToSkip) {
|
|||
set_tracelen(numbts);
|
||||
|
||||
Dbprintf("Felica sniffing done, tracelen: %i, use hf list felica for annotations", BigBuf_get_traceLen());
|
||||
cmd_send(CMD_ACK,1, numbts,0,0,0);
|
||||
cmd_send(CMD_ACK, 1, numbts, 0, 0, 0);
|
||||
}
|
||||
|
||||
#define R_POLL0_LEN 0x16
|
||||
|
|
@ -610,7 +624,8 @@ void felica_sniff(uint32_t samplesToSkip, uint32_t triggersToSkip) {
|
|||
#define R_READBLK_LEN 0x21
|
||||
//simulate NFC Tag3 card - for now only poll response works
|
||||
// second half (4 bytes) of NDEF2 goes into nfcid2_0, first into nfcid2_1
|
||||
void felica_sim_lite(uint64_t nfcid) {
|
||||
void felica_sim_lite(uint64_t nfcid)
|
||||
{
|
||||
|
||||
int i, curlen = 0;
|
||||
uint8_t *curresp = 0;
|
||||
|
|
@ -619,21 +634,21 @@ void felica_sim_lite(uint64_t nfcid) {
|
|||
num_to_bytes(nfcid, 8, ndef);
|
||||
|
||||
//prepare our 3 responses...
|
||||
uint8_t resp_poll0[R_POLL0_LEN] = { 0xb2,0x4d,0x12,FELICA_POLL_ACK,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xf1,0x00,0x00,0x00,0x01,0x43,0x00,0xb3,0x7f};
|
||||
uint8_t resp_poll1[R_POLL1_LEN] = { 0xb2,0x4d,0x14,FELICA_POLL_ACK,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xf1,0x00,0x00,0x00,0x01,0x43,0x00, 0x88,0xb4,0xb3,0x7f};
|
||||
uint8_t resp_readblk[R_READBLK_LEN] = { 0xb2,0x4d,0x1d,FELICA_RDBLK_ACK,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x10,0x04,0x01,0x00,0x0d,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x23,0xcb,0x6e};
|
||||
uint8_t resp_poll0[R_POLL0_LEN] = { 0xb2, 0x4d, 0x12, FELICA_POLL_ACK, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf1, 0x00, 0x00, 0x00, 0x01, 0x43, 0x00, 0xb3, 0x7f};
|
||||
uint8_t resp_poll1[R_POLL1_LEN] = { 0xb2, 0x4d, 0x14, FELICA_POLL_ACK, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf1, 0x00, 0x00, 0x00, 0x01, 0x43, 0x00, 0x88, 0xb4, 0xb3, 0x7f};
|
||||
uint8_t resp_readblk[R_READBLK_LEN] = { 0xb2, 0x4d, 0x1d, FELICA_RDBLK_ACK, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x10, 0x04, 0x01, 0x00, 0x0d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x23, 0xcb, 0x6e};
|
||||
|
||||
//NFC tag 3/ ISo technically. Many overlapping standards
|
||||
DbpString("Felica Lite-S sim start");
|
||||
Dbprintf("NDEF2 UID: %02x %02x %02x %02x %02x %02x %02x %02x",
|
||||
ndef[0], ndef[1], ndef[2], ndef[3], ndef[4], ndef[5], ndef[6], ndef[7]
|
||||
);
|
||||
ndef[0], ndef[1], ndef[2], ndef[3], ndef[4], ndef[5], ndef[6], ndef[7]
|
||||
);
|
||||
|
||||
//fill in blanks
|
||||
for( i=0; i<8; i++) {
|
||||
resp_poll0[i+4] = ndef[i];
|
||||
resp_poll1[i+4] = ndef[i];
|
||||
resp_readblk[i+4] = ndef[i];
|
||||
for (i = 0; i < 8; i++) {
|
||||
resp_poll0[i + 4] = ndef[i];
|
||||
resp_poll1[i + 4] = ndef[i];
|
||||
resp_readblk[i + 4] = ndef[i];
|
||||
}
|
||||
|
||||
//calculate and set CRC
|
||||
|
|
@ -641,12 +656,12 @@ void felica_sim_lite(uint64_t nfcid) {
|
|||
AddCrc(resp_poll1, resp_poll1[2]);
|
||||
AddCrc(resp_readblk, resp_readblk[2]);
|
||||
|
||||
iso18092_setup( FPGA_HF_ISO18092_FLAG_NOMOD);
|
||||
iso18092_setup(FPGA_HF_ISO18092_FLAG_NOMOD);
|
||||
|
||||
bool listenmode = true;
|
||||
//uint32_t frtm = GetCountSspClk();
|
||||
for(;;) {
|
||||
if( BUTTON_PRESS()) break;
|
||||
for (;;) {
|
||||
if (BUTTON_PRESS()) break;
|
||||
WDT_HIT();
|
||||
|
||||
if (listenmode) {
|
||||
|
|
@ -716,11 +731,12 @@ void felica_sim_lite(uint64_t nfcid) {
|
|||
DbpString("Felica Lite-S sim end");
|
||||
}
|
||||
|
||||
void felica_dump_lite_s() {
|
||||
void felica_dump_lite_s()
|
||||
{
|
||||
|
||||
uint8_t ndef[8];
|
||||
uint8_t poll[10] = { 0xb2,0x4d,0x06,FELICA_POLL_REQ,0xff,0xff,0x00,0x00,0x09,0x21};
|
||||
uint16_t liteblks[28] = {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x90,0x91,0x92,0xa0};
|
||||
uint8_t poll[10] = { 0xb2, 0x4d, 0x06, FELICA_POLL_REQ, 0xff, 0xff, 0x00, 0x00, 0x09, 0x21};
|
||||
uint16_t liteblks[28] = {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x90, 0x91, 0x92, 0xa0};
|
||||
|
||||
// setup device.
|
||||
iso18092_setup(FPGA_HF_ISO18092_FLAG_READER | FPGA_HF_ISO18092_FLAG_NOMOD);
|
||||
|
|
@ -743,15 +759,15 @@ void felica_dump_lite_s() {
|
|||
// copy 8bytes to ndef.
|
||||
memcpy(ndef, FelicaFrame.framebytes + 4, 8);
|
||||
// for (c=0; c < 8; c++)
|
||||
// ndef[c] = FelicaFrame.framebytes[c+4];
|
||||
// ndef[c] = FelicaFrame.framebytes[c+4];
|
||||
|
||||
for (blknum=0; blknum < sizeof(liteblks); ) {
|
||||
for (blknum = 0; blknum < sizeof(liteblks);) {
|
||||
|
||||
// block to read.
|
||||
BuildFliteRdblk(ndef, 1, &liteblks[blknum]);
|
||||
|
||||
//TransmitFor18092_AsReader(frameSpace, frameSpace[2]+4, GetCountSspClk()+512, 1, 0);
|
||||
TransmitFor18092_AsReader(frameSpace, frameSpace[2]+4, NULL, 1, 0);
|
||||
TransmitFor18092_AsReader(frameSpace, frameSpace[2] + 4, NULL, 1, 0);
|
||||
|
||||
// read block
|
||||
if (WaitForFelicaReply(1024) && FelicaFrame.framebytes[3] == FELICA_RDBLK_ACK) {
|
||||
|
|
@ -764,15 +780,15 @@ void felica_dump_lite_s() {
|
|||
|
||||
//memcpy(dest+cnt, FelicaFrame.framebytes + 15, 16);
|
||||
//cnt += 16;
|
||||
for(uint8_t j=0; j < 16; j++)
|
||||
dest[cnt++] = fb[15+j];
|
||||
for (uint8_t j = 0; j < 16; j++)
|
||||
dest[cnt++] = fb[15 + j];
|
||||
|
||||
blknum++;
|
||||
cntfails = 0;
|
||||
|
||||
// // print raw log.
|
||||
// Dbprintf("LEN %u | Dump bytes count %u ", FelicaFrame.len, cnt);
|
||||
Dbhexdump(FelicaFrame.len, FelicaFrame.framebytes+15, 0);
|
||||
Dbhexdump(FelicaFrame.len, FelicaFrame.framebytes + 15, 0);
|
||||
} else {
|
||||
cntfails++;
|
||||
if (cntfails > 12) {
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue