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433 lines
15 KiB
C++
433 lines
15 KiB
C++
/****************************************************************************
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**
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** Copyright (C) 2015 The Qt Company Ltd.
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** Copyright (C) 2011 Thiago Macieira <thiago@kde.org>
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** Contact: http://www.qt.io/licensing/
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**
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** This file is part of the QtCore module of the Qt Toolkit.
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**
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** $QT_BEGIN_LICENSE:LGPL21$
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** Commercial License Usage
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** Licensees holding valid commercial Qt licenses may use this file in
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** accordance with the commercial license agreement provided with the
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** Software or, alternatively, in accordance with the terms contained in
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** a written agreement between you and The Qt Company. For licensing terms
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** and conditions see http://www.qt.io/terms-conditions. For further
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** information use the contact form at http://www.qt.io/contact-us.
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**
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** GNU Lesser General Public License Usage
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** Alternatively, this file may be used under the terms of the GNU Lesser
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** General Public License version 2.1 or version 3 as published by the Free
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** Software Foundation and appearing in the file LICENSE.LGPLv21 and
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** LICENSE.LGPLv3 included in the packaging of this file. Please review the
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** following information to ensure the GNU Lesser General Public License
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** requirements will be met: https://www.gnu.org/licenses/lgpl.html and
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** http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
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**
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** As a special exception, The Qt Company gives you certain additional
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** rights. These rights are described in The Qt Company LGPL Exception
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** version 1.1, included in the file LGPL_EXCEPTION.txt in this package.
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**
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** $QT_END_LICENSE$
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**
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****************************************************************************/
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#ifndef QATOMIC_X86_H
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#define QATOMIC_X86_H
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#include <QtCore/qgenericatomic.h>
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QT_BEGIN_NAMESPACE
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#if 0
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// silence syncqt warnings
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QT_END_NAMESPACE
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#pragma qt_sync_skip_header_check
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#pragma qt_sync_stop_processing
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#endif
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#define Q_ATOMIC_INT_REFERENCE_COUNTING_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT_REFERENCE_COUNTING_IS_WAIT_FREE
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#define Q_ATOMIC_INT_TEST_AND_SET_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT_TEST_AND_SET_IS_WAIT_FREE
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#define Q_ATOMIC_INT_FETCH_AND_STORE_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT_FETCH_AND_STORE_IS_WAIT_FREE
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#define Q_ATOMIC_INT_FETCH_AND_ADD_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT_FETCH_AND_ADD_IS_WAIT_FREE
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#define Q_ATOMIC_INT32_IS_SUPPORTED
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#define Q_ATOMIC_INT32_REFERENCE_COUNTING_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT32_REFERENCE_COUNTING_IS_WAIT_FREE
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#define Q_ATOMIC_INT32_TEST_AND_SET_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT32_TEST_AND_SET_IS_WAIT_FREE
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#define Q_ATOMIC_INT32_FETCH_AND_STORE_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT32_FETCH_AND_STORE_IS_WAIT_FREE
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#define Q_ATOMIC_INT32_FETCH_AND_ADD_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT32_FETCH_AND_ADD_IS_WAIT_FREE
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#define Q_ATOMIC_POINTER_TEST_AND_SET_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_POINTER_TEST_AND_SET_IS_WAIT_FREE
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#define Q_ATOMIC_POINTER_FETCH_AND_STORE_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_POINTER_FETCH_AND_STORE_IS_WAIT_FREE
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#define Q_ATOMIC_POINTER_FETCH_AND_ADD_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_POINTER_FETCH_AND_ADD_IS_WAIT_FREE
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template <int size> struct QBasicAtomicOps: QGenericAtomicOps<QBasicAtomicOps<size> >
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{
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static inline Q_DECL_CONSTEXPR bool isReferenceCountingNative() Q_DECL_NOTHROW { return true; }
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static inline Q_DECL_CONSTEXPR bool isReferenceCountingWaitFree() Q_DECL_NOTHROW { return true; }
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template <typename T> static bool ref(T &_q_value) Q_DECL_NOTHROW;
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template <typename T> static bool deref(T &_q_value) Q_DECL_NOTHROW;
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static inline Q_DECL_CONSTEXPR bool isTestAndSetNative() Q_DECL_NOTHROW { return true; }
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static inline Q_DECL_CONSTEXPR bool isTestAndSetWaitFree() Q_DECL_NOTHROW { return true; }
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template <typename T> static bool testAndSetRelaxed(T &_q_value, T expectedValue, T newValue) Q_DECL_NOTHROW;
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template <typename T> static bool
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testAndSetRelaxed(T &_q_value, T expectedValue, T newValue, T *currentValue) Q_DECL_NOTHROW;
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static inline Q_DECL_CONSTEXPR bool isFetchAndStoreNative() Q_DECL_NOTHROW { return true; }
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static inline Q_DECL_CONSTEXPR bool isFetchAndStoreWaitFree() Q_DECL_NOTHROW { return true; }
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template <typename T> static T fetchAndStoreRelaxed(T &_q_value, T newValue) Q_DECL_NOTHROW;
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static inline Q_DECL_CONSTEXPR bool isFetchAndAddNative() Q_DECL_NOTHROW { return true; }
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static inline Q_DECL_CONSTEXPR bool isFetchAndAddWaitFree() Q_DECL_NOTHROW { return true; }
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template <typename T> static
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T fetchAndAddRelaxed(T &_q_value, typename QAtomicAdditiveType<T>::AdditiveT valueToAdd) Q_DECL_NOTHROW;
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};
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template <typename T> struct QAtomicOps : QBasicAtomicOps<sizeof(T)>
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{
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typedef T Type;
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};
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#if defined(Q_CC_GNU)
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template<> struct QAtomicOpsSupport<1> { enum { IsSupported = 1 }; };
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template<> struct QAtomicOpsSupport<2> { enum { IsSupported = 1 }; };
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template<> struct QAtomicOpsSupport<8> { enum { IsSupported = 1 }; };
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/*
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* Guide for the inline assembly below:
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*
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* x86 instructions are in the form "{opcode}{length} {source}, {destination}",
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* where the length is one of the letters "b" (byte), "w" (word, 16-bit), "l"
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* (dword, 32-bit), "q" (qword, 64-bit).
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*
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* In most cases, we can omit the length because it's inferred from one of the
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* registers. For example, "xchg %0,%1" doesn't need the length suffix because
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* we can only exchange data of the same size and one of the operands must be a
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* register.
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*
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* The exception is the increment and decrement functions, where we add and
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* subtract an immediate value (1). For those, we need to specify the length.
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* GCC and ICC support the syntax "add%z0 $1, %0", where "%z0" expands to the
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* length of the operand. Unfortunately, clang as of 3.0 doesn't support that.
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* For that reason, the ref() and deref() functions are rolled out for all
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* sizes.
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*
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* The functions are also rolled out for the 1-byte operations since those
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* require a special register constraint "q" to force the compiler to schedule
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* one of the 8-bit registers. It's probably a compiler bug that it tries to
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* use a register that doesn't exist.
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*
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* Finally, 64-bit operations are supported via the cmpxchg8b instruction on
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* 32-bit processors, via specialisation below.
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*/
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template<> template<typename T> inline
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bool QBasicAtomicOps<1>::ref(T &_q_value) Q_DECL_NOTHROW
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{
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unsigned char ret;
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asm volatile("lock\n"
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"addb $1, %0\n"
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"setne %1"
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: "=m" (_q_value), "=qm" (ret)
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: "m" (_q_value)
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: "memory");
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return ret != 0;
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}
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template<> template<typename T> inline
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bool QBasicAtomicOps<2>::ref(T &_q_value) Q_DECL_NOTHROW
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{
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unsigned char ret;
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asm volatile("lock\n"
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"incw %0\n"
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"setne %1"
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: "=m" (_q_value), "=qm" (ret)
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: "m" (_q_value)
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: "memory");
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return ret != 0;
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}
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template<> template<typename T> inline
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bool QBasicAtomicOps<4>::ref(T &_q_value) Q_DECL_NOTHROW
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{
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unsigned char ret;
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asm volatile("lock\n"
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"addl $1, %0\n"
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"setne %1"
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: "=m" (_q_value), "=qm" (ret)
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: "m" (_q_value)
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: "memory");
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return ret != 0;
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}
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template<> template <typename T> inline
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bool QBasicAtomicOps<1>::deref(T &_q_value) Q_DECL_NOTHROW
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{
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unsigned char ret;
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asm volatile("lock\n"
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"subb $1, %0\n"
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"setne %1"
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: "=m" (_q_value), "=qm" (ret)
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: "m" (_q_value)
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: "memory");
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return ret != 0;
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}
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template<> template <typename T> inline
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bool QBasicAtomicOps<2>::deref(T &_q_value) Q_DECL_NOTHROW
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{
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unsigned char ret;
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asm volatile("lock\n"
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"decw %0\n"
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"setne %1"
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: "=m" (_q_value), "=qm" (ret)
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: "m" (_q_value)
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: "memory");
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return ret != 0;
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}
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template<> template <typename T> inline
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bool QBasicAtomicOps<4>::deref(T &_q_value) Q_DECL_NOTHROW
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{
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unsigned char ret;
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asm volatile("lock\n"
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"subl $1, %0\n"
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"setne %1"
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: "=m" (_q_value), "=qm" (ret)
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: "m" (_q_value)
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: "memory");
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return ret != 0;
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}
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template<int size> template <typename T> inline
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bool QBasicAtomicOps<size>::testAndSetRelaxed(T &_q_value, T expectedValue, T newValue) Q_DECL_NOTHROW
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{
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unsigned char ret;
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asm volatile("lock\n"
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"cmpxchg %3,%2\n"
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"sete %1\n"
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: "=a" (newValue), "=qm" (ret), "+m" (_q_value)
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: "r" (newValue), "0" (expectedValue)
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: "memory");
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return ret != 0;
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}
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template<> template <typename T> inline
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bool QBasicAtomicOps<1>::testAndSetRelaxed(T &_q_value, T expectedValue, T newValue) Q_DECL_NOTHROW
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{
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unsigned char ret;
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asm volatile("lock\n"
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"cmpxchg %3,%2\n"
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"sete %1\n"
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: "=a" (newValue), "=qm" (ret), "+m" (_q_value)
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: "q" (newValue), "0" (expectedValue)
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: "memory");
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return ret != 0;
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}
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template<int size> template <typename T> inline
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bool QBasicAtomicOps<size>::testAndSetRelaxed(T &_q_value, T expectedValue,
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T newValue, T *currentValue) Q_DECL_NOTHROW
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{
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unsigned char ret;
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asm volatile("lock\n"
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"cmpxchg %3,%2\n"
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"sete %1\n"
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: "=a" (newValue), "=qm" (ret), "+m" (_q_value)
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: "r" (newValue), "0" (expectedValue)
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: "memory");
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*currentValue = newValue;
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return ret != 0;
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}
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template<> template <typename T> inline
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bool QBasicAtomicOps<1>::testAndSetRelaxed(T &_q_value, T expectedValue,
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T newValue, T *currentValue) Q_DECL_NOTHROW
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{
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unsigned char ret;
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asm volatile("lock\n"
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"cmpxchg %3,%2\n"
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"sete %1\n"
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: "=a" (newValue), "=qm" (ret), "+m" (_q_value)
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: "q" (newValue), "0" (expectedValue)
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: "memory");
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*currentValue = newValue;
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return ret != 0;
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}
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template<int size> template <typename T> inline
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T QBasicAtomicOps<size>::fetchAndStoreRelaxed(T &_q_value, T newValue) Q_DECL_NOTHROW
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{
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asm volatile("xchg %0,%1"
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: "=r" (newValue), "+m" (_q_value)
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: "0" (newValue)
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: "memory");
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return newValue;
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}
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template<> template <typename T> inline
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T QBasicAtomicOps<1>::fetchAndStoreRelaxed(T &_q_value, T newValue) Q_DECL_NOTHROW
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{
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asm volatile("xchg %0,%1"
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: "=q" (newValue), "+m" (_q_value)
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: "0" (newValue)
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: "memory");
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return newValue;
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}
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template<int size> template <typename T> inline
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T QBasicAtomicOps<size>::fetchAndAddRelaxed(T &_q_value, typename QAtomicAdditiveType<T>::AdditiveT valueToAdd) Q_DECL_NOTHROW
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{
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T result;
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asm volatile("lock\n"
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"xadd %0,%1"
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: "=r" (result), "+m" (_q_value)
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: "0" (T(valueToAdd * QAtomicAdditiveType<T>::AddScale))
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: "memory");
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return result;
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}
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template<> template <typename T> inline
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T QBasicAtomicOps<1>::fetchAndAddRelaxed(T &_q_value, typename QAtomicAdditiveType<T>::AdditiveT valueToAdd) Q_DECL_NOTHROW
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{
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T result;
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asm volatile("lock\n"
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"xadd %0,%1"
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: "=q" (result), "+m" (_q_value)
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: "0" (T(valueToAdd * QAtomicAdditiveType<T>::AddScale))
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: "memory");
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return result;
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}
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#define Q_ATOMIC_INT8_IS_SUPPORTED
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#define Q_ATOMIC_INT8_REFERENCE_COUNTING_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT8_REFERENCE_COUNTING_IS_WAIT_FREE
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#define Q_ATOMIC_INT8_TEST_AND_SET_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT8_TEST_AND_SET_IS_WAIT_FREE
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#define Q_ATOMIC_INT8_FETCH_AND_STORE_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT8_FETCH_AND_STORE_IS_WAIT_FREE
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#define Q_ATOMIC_INT8_FETCH_AND_ADD_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT8_FETCH_AND_ADD_IS_WAIT_FREE
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#define Q_ATOMIC_INT16_IS_SUPPORTED
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#define Q_ATOMIC_INT16_REFERENCE_COUNTING_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT16_REFERENCE_COUNTING_IS_WAIT_FREE
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#define Q_ATOMIC_INT16_TEST_AND_SET_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT16_TEST_AND_SET_IS_WAIT_FREE
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#define Q_ATOMIC_INT16_FETCH_AND_STORE_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT16_FETCH_AND_STORE_IS_WAIT_FREE
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#define Q_ATOMIC_INT16_FETCH_AND_ADD_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT16_FETCH_AND_ADD_IS_WAIT_FREE
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#ifdef Q_PROCESSOR_X86_64
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#define Q_ATOMIC_INT64_IS_SUPPORTED
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#define Q_ATOMIC_INT64_REFERENCE_COUNTING_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT64_REFERENCE_COUNTING_IS_WAIT_FREE
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#define Q_ATOMIC_INT64_TEST_AND_SET_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT64_TEST_AND_SET_IS_WAIT_FREE
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#define Q_ATOMIC_INT64_FETCH_AND_STORE_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT64_FETCH_AND_STORE_IS_WAIT_FREE
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#define Q_ATOMIC_INT64_FETCH_AND_ADD_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT64_FETCH_AND_ADD_IS_WAIT_FREE
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// native support for 64-bit types
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template<> template<typename T> inline
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bool QBasicAtomicOps<8>::ref(T &_q_value) Q_DECL_NOTHROW
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{
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unsigned char ret;
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asm volatile("lock\n"
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"addq $1, %0\n"
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"setne %1"
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: "=m" (_q_value), "=qm" (ret)
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: "m" (_q_value)
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: "memory");
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return ret != 0;
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}
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template<> template <typename T> inline
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bool QBasicAtomicOps<8>::deref(T &_q_value) Q_DECL_NOTHROW
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{
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unsigned char ret;
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asm volatile("lock\n"
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"subq $1, %0\n"
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"setne %1"
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: "=m" (_q_value), "=qm" (ret)
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: "m" (_q_value)
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: "memory");
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return ret != 0;
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}
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#else
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// i386 architecture, emulate 64-bit support via cmpxchg8b
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template <> struct QBasicAtomicOps<8>: QGenericAtomicOps<QBasicAtomicOps<8> >
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{
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static inline Q_DECL_CONSTEXPR bool isTestAndSetNative() Q_DECL_NOTHROW { return true; }
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static inline Q_DECL_CONSTEXPR bool isTestAndSetWaitFree() Q_DECL_NOTHROW { return true; }
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template <typename T> static inline
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bool testAndSetRelaxed(T &_q_value, T expectedValue, T newValue) Q_DECL_NOTHROW
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{
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#ifdef __PIC__
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# define EBX_reg "r"
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# define EBX_load(reg) "xchg " reg ", %%ebx\n"
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#else
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# define EBX_reg "b"
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# define EBX_load(reg)
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#endif
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quint32 highExpectedValue = quint32(newValue >> 32); // ECX
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asm volatile(EBX_load("%3")
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"lock\n"
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"cmpxchg8b %0\n"
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EBX_load("%3")
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"sete %%cl\n"
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: "+m" (_q_value), "+c" (highExpectedValue), "+&A" (expectedValue)
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: EBX_reg (quint32(newValue & 0xffffffff))
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: "memory");
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// if the comparison failed, expectedValue here contains the current value
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return quint8(highExpectedValue) != 0;
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#undef EBX_reg
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#undef EBX_load
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}
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};
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#endif
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#else
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# error "This compiler for x86 is not supported"
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#endif
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QT_END_NAMESPACE
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#endif // QATOMIC_X86_H
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